2 * U-boot - Configuration file for Bluetechnix TCM-BF518 board
5 #ifndef __CONFIG_TCM_BF518_H__
6 #define __CONFIG_TCM_BF518_H__
8 #include <asm/config-pre.h>
14 #define CONFIG_BFIN_CPU bf518-0.0
15 #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
23 /* CONFIG_CLKIN_HZ is any value in Hz */
24 #define CONFIG_CLKIN_HZ 25000000
25 /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
27 #define CONFIG_CLKIN_HALF 0
28 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
30 #define CONFIG_PLL_BYPASS 0
31 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
32 /* Values can range from 0-63 (where 0 means 64) */
33 #define CONFIG_VCO_MULT 16
34 /* CCLK_DIV controls the core clock divider */
35 /* Values can be 1, 2, 4, or 8 ONLY */
36 #define CONFIG_CCLK_DIV 1
37 /* SCLK_DIV controls the system clock divider */
38 /* Values can range from 1-15 */
39 #define CONFIG_SCLK_DIV 4
45 /* This board has a 32meg MT48H16M16 */
46 #define CONFIG_MEM_ADD_WDTH 9
47 #define CONFIG_MEM_SIZE 32
49 #define CONFIG_EBIU_SDRRC_VAL 0x3f8
50 #define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
52 #define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
53 #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
54 #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
56 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
57 #define CONFIG_SYS_MALLOC_LEN (384 * 1024)
63 #if !defined(__ADSPBF512__) && !defined(__ADSPBF514__)
64 #define ADI_CMDS_NETWORK 1
65 #define CONFIG_BFIN_MAC
66 #define CONFIG_NETCONSOLE 1
68 #define CONFIG_HOSTNAME tcm-bf518
69 /* Uncomment next line to use fixed MAC address */
70 /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
71 #define CONFIG_LIB_RAND
76 #define CONFIG_FLASH_CFI_DRIVER
77 #define CONFIG_SYS_FLASH_BASE 0x20000000
78 #define CONFIG_SYS_FLASH_CFI
79 #define CONFIG_SYS_FLASH_PROTECTION
80 #define CONFIG_SYS_MAX_FLASH_BANKS 1
81 #define CONFIG_SYS_MAX_FLASH_SECT 19
87 #define CONFIG_BFIN_SPI
88 #define CONFIG_ENV_SPI_MAX_HZ 30000000
89 #define CONFIG_SF_DEFAULT_SPEED 30000000
93 * Env Storage Settings
95 #define CONFIG_ENV_IS_IN_FLASH
96 #define CONFIG_ENV_OFFSET 0x8000
97 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
98 #define CONFIG_ENV_SIZE 0x2000
99 #define CONFIG_ENV_SECT_SIZE 0x8000
100 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
106 #define CONFIG_BFIN_TWI_I2C 1
107 #define CONFIG_HARD_I2C 1
113 #define CONFIG_BAUDRATE 115200
114 #define CONFIG_MISC_INIT_R
115 #define CONFIG_RTC_BFIN
116 #define CONFIG_UART_CONSOLE 0
117 #define CONFIG_BOOTCOMMAND "run flashboot"
118 #define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0x20040000\0"
119 #define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED
122 * Pull in common ADI header for remaining command/environment setup
124 #include <configs/bfin_adi_common.h>