arm: zynq: Setup non zero SPL FIT load address
[platform/kernel/u-boot.git] / include / configs / tbs2910.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2014 Soeren Moch <smoch@web.de>
4  *
5  * Configuration settings for the TBS2910 MatrixARM board.
6  */
7
8 #ifndef __TBS2910_CONFIG_H
9 #define __TBS2910_CONFIG_H
10
11 #include "mx6_common.h"
12
13 /* General configuration */
14
15 #define CONFIG_MACH_TYPE                3980
16
17 #define CONFIG_SYS_HZ                   1000
18
19 #define CONFIG_IMX_THERMAL
20
21 /* Physical Memory Map */
22 #define CONFIG_SYS_SDRAM_BASE           MMDC0_ARB_BASE_ADDR
23
24 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
25 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
26 #define CONFIG_SYS_INIT_SP_OFFSET \
27         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
28 #define CONFIG_SYS_INIT_SP_ADDR \
29         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
30
31 #define CONFIG_SYS_MALLOC_LEN           (128 * 1024 * 1024)
32
33 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
34 #define CONFIG_SYS_MEMTEST_END \
35         (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
36
37 #define CONFIG_SYS_BOOTMAPSZ            0x10000000
38
39 /* Serial console */
40 #define CONFIG_MXC_UART
41 #define CONFIG_MXC_UART_BASE            UART1_BASE /* select UART1/UART2 */
42
43 /* Filesystems / image support */
44
45 /* MMC */
46 #define CONFIG_SYS_FSL_USDHC_NUM        3
47 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC4_BASE_ADDR
48 #define CONFIG_SUPPORT_EMMC_BOOT
49
50 /* Ethernet */
51 #define CONFIG_FEC_MXC
52 #define CONFIG_FEC_MXC
53 #define IMX_FEC_BASE                    ENET_BASE_ADDR
54 #define CONFIG_FEC_XCV_TYPE             RGMII
55 #define CONFIG_ETHPRIME                 "FEC"
56 #define CONFIG_FEC_MXC_PHYADDR          4
57 #define CONFIG_PHY_ATHEROS
58
59 /* Framebuffer */
60 #ifdef CONFIG_VIDEO
61 #define CONFIG_VIDEO_IPUV3
62 #define CONFIG_VIDEO_BMP_RLE8
63 #define CONFIG_IMX_HDMI
64 #define CONFIG_IMX_VIDEO_SKIP
65 #endif
66
67 /* PCI */
68 #ifdef CONFIG_CMD_PCI
69 #define CONFIG_PCI_SCAN_SHOW
70 #define CONFIG_PCIE_IMX
71 #define CONFIG_PCIE_IMX_PERST_GPIO      IMX_GPIO_NR(7, 12)
72 #endif
73
74 /* SATA */
75 #ifdef CONFIG_CMD_SATA
76 #define CONFIG_SYS_SATA_MAX_DEVICE      1
77 #define CONFIG_DWC_AHSATA_PORT_ID       0
78 #define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_ARB_BASE_ADDR
79 #define CONFIG_LBA48
80 #endif
81
82 /* USB */
83 #ifdef CONFIG_CMD_USB
84 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
85 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
86 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
87 #ifdef CONFIG_CMD_USB_MASS_STORAGE
88 #define CONFIG_USBD_HS
89 #endif /* CONFIG_CMD_USB_MASS_STORAGE */
90 #ifdef CONFIG_USB_KEYBOARD
91 #define CONFIG_PREBOOT \
92         "usb start; " \
93         "if hdmidet; then " \
94                 "run set_con_hdmi; " \
95         "else " \
96                 "run set_con_serial; " \
97         "fi;"
98 #endif /* CONFIG_USB_KEYBOARD */
99 #endif /* CONFIG_CMD_USB      */
100
101 /* RTC */
102 #ifdef CONFIG_CMD_DATE
103 #define CONFIG_RTC_DS1307
104 #define CONFIG_SYS_RTC_BUS_NUM          2
105 #endif
106
107 /* I2C */
108 #ifdef CONFIG_CMD_I2C
109 #define CONFIG_SYS_I2C
110 #define CONFIG_SYS_I2C_MXC
111 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
112 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
113 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
114 #define CONFIG_SYS_I2C_SPEED            100000
115 #define CONFIG_I2C_EDID
116 #endif
117
118 /* Environment organization */
119 #define CONFIG_SYS_MMC_ENV_DEV          2 /* overwritten on SD boot */
120 #define CONFIG_SYS_MMC_ENV_PART         1 /* overwritten on SD boot */
121 #define CONFIG_ENV_SIZE                 (8 * 1024)
122 #define CONFIG_ENV_OFFSET               (384 * 1024)
123 #define CONFIG_ENV_OVERWRITE
124
125 #define CONFIG_EXTRA_ENV_SETTINGS \
126         "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
127         "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
128                         "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
129         "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
130         "bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
131                         "${bootargs_mmc3}\0" \
132         "bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
133                         "rdinit=/sbin/init enable_wait_mode=off\0" \
134         "bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
135                         "mmc read 0x10800000 0x800 0x4000; bootm 0x10800000\0" \
136         "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
137         "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
138                         "run bootargs_upd; " \
139                         "bootm 0x10800000 0x10d00000\0" \
140         "console=ttymxc0\0" \
141         "fan=gpio set 92\0" \
142         "set_con_serial=setenv stdout serial; " \
143                         "setenv stderr serial;\0" \
144         "set_con_hdmi=setenv stdout serial,vga; " \
145                         "setenv stderr serial,vga;\0" \
146         "stderr=serial,vga;\0" \
147         "stdin=serial,usbkbd;\0" \
148         "stdout=serial,vga;\0"
149
150 #define CONFIG_BOOTCOMMAND \
151         "mmc rescan; " \
152         "if run bootcmd_up1; then " \
153                 "run bootcmd_up2; " \
154         "else " \
155                 "run bootcmd_mmc; " \
156         "fi"
157
158 #endif                         /* __TBS2910_CONFIG_H * */