1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
4 * (C) Copyright 2013 Siemens AG
7 * U-Boot file: include/configs/at91sam9260ek.h
9 * (C) Copyright 2007-2008
10 * Stelian Pop <stelian@popies.net>
11 * Lead Tech Design <www.leadtechdesign.com>
18 * SoC must be defined first, before hardware.h is included.
19 * In this case SoC is defined in boards.cfg.
21 #include <asm/hardware.h>
22 #include <linux/sizes.h>
25 * Warning: changing CONFIG_TEXT_BASE requires
26 * adapting the initial boot program.
27 * Since the linker has to swallow that define, we must use a pure
31 /* ARM asynchronous clock */
32 #define CFG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
33 #define CFG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
35 /* Misc CPU related */
37 #define CFG_USART_BASE ATMEL_BASE_DBGU
38 #define CFG_USART_ID ATMEL_ID_SYS
41 * SDRAM: 1 bank, min 32, max 128 MB
42 * Initialized before u-boot gets started.
44 #define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1
45 #define CFG_SYS_SDRAM_SIZE (128 * SZ_1M)
48 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
49 * leaving the correct space for initial global data structure above
50 * that address while providing maximum stack area below.
52 #define CFG_SYS_INIT_RAM_SIZE 0x1000
53 #define CFG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1
56 #ifdef CONFIG_CMD_NAND
57 #define CFG_SYS_NAND_BASE ATMEL_BASE_CS3
58 #define CFG_SYS_NAND_MASK_ALE (1 << 21)
59 #define CFG_SYS_NAND_MASK_CLE (1 << 22)
60 #define CFG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
61 #define CFG_SYS_NAND_READY_PIN AT91_PIN_PC13
64 #if defined(CONFIG_BOARD_TAURUS)
65 /* DFU class support */
66 #define DFU_MANIFEST_POLL_TIMEOUT 25000
70 #define TAURUS_SPI_MASK (1 << 4)
72 /* bootstrap in spi flash , u-boot + env + linux in nandflash */
74 #if defined(CONFIG_BOARD_AXM)
75 #define CFG_EXTRA_ENV_SETTINGS \
76 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
77 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
78 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
79 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
82 "flash_nfs=run nand_kernel;run nfsargs;run addip;" \
83 "upgrade_available;bootm ${kernel_ram};reset\0" \
84 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
85 "bootm ${kernel_ram};reset\0" \
86 "flash_self_test=run nand_kernel;run setbootargs addtest;" \
87 "upgrade_available;bootm ${kernel_ram};reset\0" \
88 "hostname=systemone\0" \
89 "kernel_Off=0x00200000\0" \
90 "kernel_Off_fallback=0x03800000\0" \
91 "kernel_ram=0x21500000\0" \
92 "kernel_size=0x00400000\0" \
93 "kernel_size_fallback=0x00400000\0" \
95 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
97 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
98 "run nfsargs;run addip;upgrade_available;" \
99 "bootm ${kernel_ram};reset\0" \
101 "nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs " \
102 "rw nfsroot=${serverip}:${rootpath} " \
103 "at91sam9_wdt.wdt_timeout=16\0" \
104 "partitionset_active=A\0" \
105 "preboot=echo;echo Type 'run flash_self' to use kernel and root " \
106 "filesystem on memory;echo Type 'run flash_nfs' to use " \
107 "kernel from memory and root filesystem over NFS;echo Type " \
108 "'run net_nfs' to get Kernel over TFTP and mount root " \
109 "filesystem over NFS;echo\0" \
110 "project_dir=systemone\0" \
111 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0" \
112 "rootfs=/dev/mtdblock5\0" \
113 "rootfs_fallback=/dev/mtdblock7\0" \
114 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops " \
115 "root=${rootfs} rootfstype=jffs2 panic=7 " \
116 "at91sam9_wdt.wdt_timeout=16\0" \
120 "upgrade_available=0\0"
123 /* Defines for SPL */
125 #define CFG_SYS_NAND_U_BOOT_SIZE SZ_512K
126 #define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
127 #define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
129 #define CFG_SYS_NAND_ECCSIZE 256
130 #define CFG_SYS_NAND_ECCBYTES 3
131 #define CFG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
132 48, 49, 50, 51, 52, 53, 54, 55, \
133 56, 57, 58, 59, 60, 61, 62, 63, }
135 #define CFG_SYS_MASTER_CLOCK 132096000
136 #define AT91_PLL_LOCK_TIMEOUT 1000000
137 #define CFG_SYS_AT91_PLLA 0x202A3F01
138 #define CFG_SYS_MCKR 0x1300
139 #define CFG_SYS_MCKR_CSS (0x02 | CFG_SYS_MCKR)
140 #define CFG_SYS_AT91_PLLB 0x10193F05