include/configs/tam3517-common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2011
   4  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
   5  *
   6  * Copyright (C) 2009 TechNexion Ltd.
   7  */
   8
   9 #ifndef __TAM3517_H
  10 #define __TAM3517_H
  11
  12 /*
  13  * High Level Configuration Options
  14  */
  15
  16 #include <asm/arch/cpu.h>               /* get chip and board defs */
  17 #include <asm/arch/omap.h>
  18
  19 /* Clock Defines */
  20 #define V_OSCK                  26000000        /* Clock output from T2 */
  21 #define V_SCLK                  (V_OSCK >> 1)
  22
  23 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
  24 #define CONFIG_SETUP_MEMORY_TAGS
  25 #define CONFIG_INITRD_TAG
  26 #define CONFIG_REVISION_TAG
  27
  28 /*
  29  * Size of malloc() pool
  30  */
  31 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB sector */
  32 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10) + \
  33                                         2 * 1024 * 1024)
  34 /*
  35  * DDR related
  36  */
  37 #define CONFIG_SYS_CS0_SIZE             (256 * 1024 * 1024)
  38
  39 /*
  40  * Hardware drivers
  41  */
  42
  43 /*
  44  * NS16550 Configuration
  45  */
  46 #define CONFIG_SYS_NS16550_SERIAL
  47 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  48 #define CONFIG_SYS_NS16550_CLK          48000000        /* 48MHz (APLL96/2) */
  49
  50 /*
  51  * select serial console configuration
  52  */
  53 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
  54 #define CONFIG_SERIAL1                  /* UART1 */
  55
  56 /* allow to overwrite serial and ethaddr */
  57 #define CONFIG_ENV_OVERWRITE
  58 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  59                                         115200}
  60 /* EHCI */
  61 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO        25
  62
  63 #define CONFIG_SYS_I2C
  64 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50            /* base address */
  65 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1               /* bytes of address */
  66 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW     0x07
  67
  68 /*
  69  * Board NAND Info.
  70  */
  71 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
  72                                                         /* to access */
  73                                                         /* nand at CS0 */
  74
  75 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of */
  76                                                         /* NAND devices */
  77
  78 /*
  79  * Miscellaneous configurable options
  80  */
  81 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
  82
  83 #define CONFIG_SYS_MAXARGS              32      /* max number of command */
  84                                                 /* args */
  85 /* memtest works on */
  86 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
  87 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
  88                                         0x01F00000) /* 31MB */
  89
  90 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
  91                                                                 /* address */
  92
  93 /*
  94  * AM3517 has 12 GP timers, they can be driven by the system clock
  95  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  96  * This rate is divided by a local divisor.
  97  */
  98 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
  99 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 100
 101 /*
 102  * Physical Memory Map
 103  */
 104 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 105 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 106
 107 /*
 108  * FLASH and environment organization
 109  */
 110
 111 /* **** PISMO SUPPORT *** */
 112
 113 /* Redundant Environment */
 114 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 115 #define CONFIG_ENV_OFFSET               0x180000
 116 #define CONFIG_ENV_ADDR                 0x180000
 117 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + \
 118                                                 2 * CONFIG_SYS_ENV_SECT_SIZE)
 119 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 120
 121 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 122 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 123 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 124 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 125                                          CONFIG_SYS_INIT_RAM_SIZE - \
 126                                          GENERATED_GBL_DATA_SIZE)
 127
 128 /*
 129  * ethernet support, EMAC
 130  *
 131  */
 132 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 133 #define CONFIG_BOOTP_DNS2
 134 #define CONFIG_BOOTP_SEND_HOSTNAME
 135 #define CONFIG_NET_RETRY_COUNT 10
 136
 137 /* Defines for SPL */
 138 #define CONFIG_SPL_CONSOLE
 139 #define CONFIG_SPL_NAND_SOFTECC
 140 #define CONFIG_SPL_NAND_WORKSPACE       0x8f07f000 /* below BSS */
 141
 142 #define CONFIG_SPL_NAND_BASE
 143 #define CONFIG_SPL_NAND_DRIVERS
 144 #define CONFIG_SPL_NAND_ECC
 145
 146 #define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
 147 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
 148                                          CONFIG_SPL_TEXT_BASE)
 149 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
 150
 151 #define CONFIG_SYS_SPL_MALLOC_START     0x8f000000
 152 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 153 #define CONFIG_SPL_BSS_START_ADDR       0x8f080000 /* end of RAM */
 154 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 155
 156 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
 157 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME         "u-boot.img"
 158
 159 /* FAT */
 160 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME          "uImage"
 161 #define CONFIG_SPL_FS_LOAD_ARGS_NAME            "args"
 162
 163 /* RAW SD card / eMMC */
 164 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900   /* address 0x120000 */
 165 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR   0x80    /* address 0x10000 */
 166 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS  0x80    /* 64KiB */
 167
 168 /* NAND boot config */
 169 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 170 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 171 #define CONFIG_SYS_NAND_OOBSIZE         64
 172 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
 173 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 174 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
 175 #define CONFIG_SYS_NAND_ECCPOS          {40, 41, 42, 43, 44, 45, 46, 47,\
 176                                          48, 49, 50, 51, 52, 53, 54, 55,\
 177                                          56, 57, 58, 59, 60, 61, 62, 63}
 178 #define CONFIG_SYS_NAND_ECCSIZE         256
 179 #define CONFIG_SYS_NAND_ECCBYTES        3
 180 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_SW
 181
 182 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 183
 184 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 185 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x80000
 186
 187 /* Setup MTD for NAND on the SOM */
 188
 189 #define CONFIG_TAM3517_SETTINGS                                         \
 190         "netdev=eth0\0"                                                 \
 191         "nandargs=setenv bootargs root=${nandroot} "                    \
 192                 "rootfstype=${nandrootfstype}\0"                        \
 193         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 194                 "nfsroot=${serverip}:${rootpath}\0"                     \
 195         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 196         "addip_sta=setenv bootargs ${bootargs} "                        \
 197                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 198                 ":${hostname}:${netdev}:off panic=1\0"                  \
 199         "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"               \
 200         "addip=if test -n ${ipdyn};then run addip_dyn;"                 \
 201                 "else run addip_sta;fi\0"                               \
 202         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 203         "addtty=setenv bootargs ${bootargs}"                            \
 204                 " console=ttyO0,${baudrate}\0"                          \
 205         "addmisc=setenv bootargs ${bootargs} ${misc}\0"                 \
 206         "loadaddr=82000000\0"                                           \
 207         "kernel_addr_r=82000000\0"                                      \
 208         "hostname=" CONFIG_HOSTNAME "\0"                        \
 209         "bootfile=" CONFIG_HOSTNAME "/uImage\0"         \
 210         "flash_self=run ramargs addip addtty addmtd addmisc;"           \
 211                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 212         "flash_nfs=run nfsargs addip addtty addmtd addmisc;"            \
 213                 "bootm ${kernel_addr}\0"                                \
 214         "nandboot=run nandargs addip addtty addmtd addmisc;"            \
 215                 "nand read ${kernel_addr_r} kernel\0"                   \
 216                 "bootm ${kernel_addr_r}\0"                              \
 217         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
 218                 "run nfsargs addip addtty addmtd addmisc;"              \
 219                 "bootm ${kernel_addr_r}\0"                              \
 220         "net_self=if run net_self_load;then "                           \
 221                 "run ramargs addip addtty addmtd addmisc;"              \
 222                 "bootm ${kernel_addr_r} ${ramdisk_addr_r};"             \
 223                 "else echo Images not loades;fi\0"                      \
 224         "u-boot=" CONFIG_HOSTNAME "/u-boot.img\0"               \
 225         "load=tftp ${loadaddr} ${u-boot}\0"                             \
 226         "loadmlo=tftp ${loadaddr} ${mlo}\0"                             \
 227         "mlo=" CONFIG_HOSTNAME "/MLO\0"                 \
 228         "uboot_addr=0x80000\0"                                          \
 229         "update=nandecc sw;nand erase ${uboot_addr} 100000;"            \
 230                 "nand write ${loadaddr} ${uboot_addr} 80000\0"          \
 231         "updatemlo=nandecc hw;nand erase 0 20000;"                      \
 232                 "nand write ${loadaddr} 0 20000\0"                      \
 233         "upd=if run load;then echo Updating u-boot;if run update;"      \
 234                 "then echo U-Boot updated;"                             \
 235                         "else echo Error updating u-boot !;"            \
 236                         "echo Board without bootloader !!;"             \
 237                 "fi;"                                                   \
 238                 "else echo U-Boot not downloaded..exiting;fi\0"         \
 239
 240 /*
 241  * this is common code for all TAM3517 boards.
 242  * MAC address is stored from manufacturer in
 243  * I2C EEPROM
 244  */
 245 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 246 /*
 247  * The I2C EEPROM on the TAM3517 contains
 248  * mac address and production data
 249  */
 250 struct tam3517_module_info {
 251         char customer[48];
 252         char product[48];
 253
 254         /*
 255          * bit 0~47  : sequence number
 256          * bit 48~55 : week of year, from 0.
 257          * bit 56~63 : year
 258          */
 259         unsigned long long sequence_number;
 260
 261         /*
 262          * bit 0~7   : revision fixed
 263          * bit 8~15  : revision major
 264          * bit 16~31 : TNxxx
 265          */
 266         unsigned int revision;
 267         unsigned char eth_addr[4][8];
 268         unsigned char _rev[100];
 269 };
 270
 271 #define TAM3517_READ_EEPROM(info, ret) \
 272 do {                                                            \
 273         i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
 274         if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,          \
 275                 (void *)info, sizeof(*info)))                   \
 276                 ret = 1;                                        \
 277         else                                                    \
 278                 ret = 0;                                        \
 279 } while (0)
 280
 281 #define TAM3517_READ_MAC_FROM_EEPROM(info)                      \
 282 do {                                                            \
 283         char buf[80], ethname[20];                              \
 284         int i;                                                  \
 285         memset(buf, 0, sizeof(buf));                            \
 286         for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) {   \
 287                 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X",   \
 288                         (info)->eth_addr[i][5],                 \
 289                         (info)->eth_addr[i][4],                 \
 290                         (info)->eth_addr[i][3],                 \
 291                         (info)->eth_addr[i][2],                 \
 292                         (info)->eth_addr[i][1],                 \
 293                         (info)->eth_addr[i][0]);                        \
 294                                                                 \
 295                 if (i)                                          \
 296                         sprintf(ethname, "eth%daddr", i);       \
 297                 else                                            \
 298                         strcpy(ethname, "ethaddr");             \
 299                 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
 300                 env_set(ethname, buf);                          \
 301         }                                                       \
 302 } while (0)
 303
 304 /* The following macros are taken from Technexion's documentation */
 305 #define TAM3517_sequence_number(info) \
 306         ((info)->sequence_number % 0x1000000000000LL)
 307 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
 308 #define TAM3517_year(info) ((info)->sequence_number >> 56)
 309 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
 310 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
 311 #define TAM3517_revision_tn(info) ((info)->revision >> 16)
 312
 313 #define TAM3517_PRINT_SOM_INFO(info)                            \
 314 do {                                                            \
 315         printf("Vendor:%s\n", (info)->customer);                \
 316         printf("SOM:   %s\n", (info)->product);                 \
 317         printf("SeqNr: %02llu%02llu%012llu\n",                  \
 318                 TAM3517_year(info),                             \
 319                 TAM3517_week_of_year(info),                     \
 320                 TAM3517_sequence_number(info));                 \
 321         printf("Rev:   TN%u %u.%u\n",                           \
 322                 TAM3517_revision_tn(info),                      \
 323                 TAM3517_revision_major(info),                   \
 324                 TAM3517_revision_fixed(info));                  \
 325 } while (0)
 326
 327 #endif
 328
 329 #endif /* __TAM3517_H */