3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
5 * Copyright (C) 2009 TechNexion Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
26 * High Level Configuration Options
28 #define CONFIG_OMAP /* in a TI OMAP core */
29 #define CONFIG_OMAP34XX /* which is a 34XX */
31 #define CONFIG_SYS_TEXT_BASE 0x80008000
33 #define CONFIG_SYS_CACHELINE_SIZE 64
35 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
37 #include <asm/arch/cpu.h> /* get chip and board defs */
38 #include <asm/arch/omap3.h>
41 * Display CPU and Board information
43 #define CONFIG_DISPLAY_CPUINFO
44 #define CONFIG_DISPLAY_BOARDINFO
47 #define V_OSCK 26000000 /* Clock output from T2 */
48 #define V_SCLK (V_OSCK >> 1)
50 #undef CONFIG_USE_IRQ /* no support for IRQs */
51 #define CONFIG_MISC_INIT_R
53 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
54 #define CONFIG_SETUP_MEMORY_TAGS
55 #define CONFIG_INITRD_TAG
56 #define CONFIG_REVISION_TAG
59 * Size of malloc() pool
61 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
62 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
67 #define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */
68 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
75 * NS16550 Configuration
77 #define CONFIG_SYS_NS16550
78 #define CONFIG_SYS_NS16550_SERIAL
79 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
80 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
83 * select serial console configuration
85 #define CONFIG_CONS_INDEX 1
86 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
87 #define CONFIG_SERIAL1 /* UART1 */
89 /* allow to overwrite serial and ethaddr */
90 #define CONFIG_ENV_OVERWRITE
91 #define CONFIG_BAUDRATE 115200
92 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
95 #define CONFIG_OMAP_HSMMC
96 #define CONFIG_GENERIC_MMC
97 #define CONFIG_DOS_PARTITION
100 #define CONFIG_OMAP3_GPIO_5
101 #define CONFIG_USB_EHCI
102 #define CONFIG_USB_EHCI_OMAP
103 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
104 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
105 #define CONFIG_USB_STORAGE
107 /* #define CONFIG_EHCI_DCACHE */
109 /* commands to include */
110 #include <config_cmd_default.h>
112 #define CONFIG_CMD_CACHE
113 #define CONFIG_CMD_DHCP
114 #define CONFIG_CMD_EXT2 /* EXT2 Support */
115 #define CONFIG_CMD_FAT /* FAT support */
116 #define CONFIG_CMD_GPIO
117 #define CONFIG_CMD_I2C /* I2C serial bus support */
118 #define CONFIG_CMD_MII
119 #define CONFIG_CMD_MMC /* MMC support */
120 #define CONFIG_CMD_NET
121 #define CONFIG_CMD_NFS
122 #define CONFIG_CMD_NAND /* NAND support */
123 #define CONFIG_CMD_PING
124 #define CONFIG_CMD_USB
126 #undef CONFIG_CMD_FLASH /* only NAND on the SOM */
127 #undef CONFIG_CMD_IMLS
129 #define CONFIG_SYS_NO_FLASH
130 #define CONFIG_HARD_I2C
131 #define CONFIG_SYS_I2C_SPEED 400000
132 #define CONFIG_SYS_I2C_SLAVE 1
133 #define CONFIG_SYS_I2C_BUS 0
134 #define CONFIG_SYS_I2C_BUS_SELECT 1
135 #define CONFIG_DRIVER_OMAP34XX_I2C
141 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
145 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
147 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
149 #define CONFIG_AUTO_COMPLETE
152 * Miscellaneous configurable options
154 #define CONFIG_SYS_LONGHELP /* undef to save memory */
155 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
156 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
157 #define CONFIG_CMDLINE_EDITING
158 #define CONFIG_AUTO_COMPLETE
159 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
161 /* Print Buffer Size */
162 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
163 sizeof(CONFIG_SYS_PROMPT) + 16)
164 #define CONFIG_SYS_MAXARGS 32 /* max number of command */
166 /* Boot Argument Buffer Size */
167 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
168 /* memtest works on */
169 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
170 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
171 0x01F00000) /* 31MB */
173 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
177 * AM3517 has 12 GP timers, they can be driven by the system clock
178 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
179 * This rate is divided by a local divisor.
181 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
182 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
183 #define CONFIG_SYS_HZ 1000
187 * The stack sizes are set up in start.S using the settings below
189 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
192 * Physical Memory Map
194 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
195 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
196 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
197 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
200 * FLASH and environment organization
203 /* **** PISMO SUPPORT *** */
205 /* Configure the PISMO */
206 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
208 #define CONFIG_NAND_OMAP_GPMC
209 #define GPMC_NAND_ECC_LP_x16_LAYOUT
210 #define CONFIG_ENV_IS_IN_NAND
211 #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
213 /* Redundant Environment */
214 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
215 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
216 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
217 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
218 2 * CONFIG_SYS_ENV_SECT_SIZE)
219 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
221 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
222 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
223 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
224 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
225 CONFIG_SYS_INIT_RAM_SIZE - \
226 GENERATED_GBL_DATA_SIZE)
229 * ethernet support, EMAC
232 #define CONFIG_DRIVER_TI_EMAC
233 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
235 #define CONFIG_EMAC_MDIO_PHY_NUM 0
236 #define CONFIG_BOOTP_DEFAULT
237 #define CONFIG_BOOTP_DNS
238 #define CONFIG_BOOTP_DNS2
239 #define CONFIG_BOOTP_SEND_HOSTNAME
240 #define CONFIG_NET_RETRY_COUNT 10
241 #define CONFIG_NET_MULTI
243 /* Defines for SPL */
245 #define CONFIG_SPL_CONSOLE
246 #define CONFIG_SPL_NAND_SIMPLE
247 #define CONFIG_SPL_NAND_SOFTECC
248 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
250 #define CONFIG_SPL_LIBCOMMON_SUPPORT
251 #define CONFIG_SPL_LIBDISK_SUPPORT
252 #define CONFIG_SPL_I2C_SUPPORT
253 #define CONFIG_SPL_LIBGENERIC_SUPPORT
254 #define CONFIG_SPL_SERIAL_SUPPORT
255 #define CONFIG_SPL_POWER_SUPPORT
256 #define CONFIG_SPL_NAND_SUPPORT
257 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
259 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
260 #define CONFIG_SPL_MAX_SIZE (45 << 10) /* 45 K */
261 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
263 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
264 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
265 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
266 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
268 /* NAND boot config */
269 #define CONFIG_SYS_NAND_PAGE_COUNT 64
270 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
271 #define CONFIG_SYS_NAND_OOBSIZE 64
272 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
273 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
274 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
275 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
276 48, 49, 50, 51, 52, 53, 54, 55,\
277 56, 57, 58, 59, 60, 61, 62, 63}
278 #define CONFIG_SYS_NAND_ECCSIZE 256
279 #define CONFIG_SYS_NAND_ECCBYTES 3
281 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
283 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
284 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
286 #define CONFIG_OF_LIBFDT
288 #define CONFIG_CMD_UBI
289 #define CONFIG_CMD_UBIFS
290 #define CONFIG_RBTREE
292 #define CONFIG_MTD_PARTITIONS
293 #define CONFIG_MTD_DEVICE
294 #define CONFIG_CMD_MTDPARTS
296 /* Setup MTD for NAND on the SOM */
297 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
298 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
299 "512k(u-boot),128k(env1)," \
300 "128k(env2),6m(kernel),-(rootfs)"
302 #define xstr(s) str(s)
305 #define CONFIG_TAM3517_SETTINGS \
307 "nandargs=setenv bootargs root=${nandroot} " \
308 "rootfstype=${nandrootfstype}\0" \
309 "nfsargs=setenv bootargs root=/dev/nfs rw " \
310 "nfsroot=${serverip}:${rootpath}\0" \
311 "ramargs=setenv bootargs root=/dev/ram rw\0" \
312 "addip_sta=setenv bootargs ${bootargs} " \
313 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
314 ":${hostname}:${netdev}:off panic=1\0" \
315 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
316 "addip=if test -n ${ipdyn};then run addip_dyn;" \
317 "else run addip_sta;fi\0" \
318 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
319 "addtty=setenv bootargs ${bootargs}" \
320 " console=ttyO0,${baudrate}\0" \
321 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
322 "loadaddr=82000000\0" \
323 "kernel_addr_r=82000000\0" \
324 "hostname=" xstr(CONFIG_HOSTNAME) "\0" \
325 "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \
326 "flash_self=run ramargs addip addtty addmtd addmisc;" \
327 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
328 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
329 "bootm ${kernel_addr}\0" \
330 "nandboot=run nandargs addip addtty addmtd addmisc;" \
331 "nand read ${kernel_addr_r} kernel\0" \
332 "bootm ${kernel_addr_r}\0" \
333 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
334 "run nfsargs addip addtty addmtd addmisc;" \
335 "bootm ${kernel_addr_r}\0" \
336 "net_self=if run net_self_load;then " \
337 "run ramargs addip addtty addmtd addmisc;" \
338 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
339 "else echo Images not loades;fi\0" \
340 "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.img\0" \
341 "load=tftp ${loadaddr} ${u-boot}\0" \
342 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
343 "mlo=" xstr(CONFIG_HOSTNAME) "/MLO\0" \
344 "uboot_addr=0x80000\0" \
345 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
346 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
347 "updatemlo=nandecc hw;nand erase 0 20000;" \
348 "nand write ${loadaddr} 0 20000\0" \
349 "upd=if run load;then echo Updating u-boot;if run update;" \
350 "then echo U-Boot updated;" \
351 "else echo Error updating u-boot !;" \
352 "echo Board without bootloader !!;" \
354 "else echo U-Boot not downloaded..exiting;fi\0" \
356 #endif /* __TAM3517_H */