3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
5 * Copyright (C) 2009 TechNexion Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
26 * High Level Configuration Options
28 #define CONFIG_OMAP /* in a TI OMAP core */
29 #define CONFIG_OMAP34XX /* which is a 34XX */
30 #define CONFIG_OMAP_GPIO
32 #define CONFIG_SYS_TEXT_BASE 0x80008000
34 #define CONFIG_SYS_CACHELINE_SIZE 64
36 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
38 #include <asm/arch/cpu.h> /* get chip and board defs */
39 #include <asm/arch/omap3.h>
42 * Display CPU and Board information
44 #define CONFIG_DISPLAY_CPUINFO
45 #define CONFIG_DISPLAY_BOARDINFO
48 #define V_OSCK 26000000 /* Clock output from T2 */
49 #define V_SCLK (V_OSCK >> 1)
51 #define CONFIG_MISC_INIT_R
53 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
54 #define CONFIG_SETUP_MEMORY_TAGS
55 #define CONFIG_INITRD_TAG
56 #define CONFIG_REVISION_TAG
59 * Size of malloc() pool
61 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
62 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
67 #define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */
68 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
75 * NS16550 Configuration
77 #define CONFIG_SYS_NS16550
78 #define CONFIG_SYS_NS16550_SERIAL
79 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
80 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
83 * select serial console configuration
85 #define CONFIG_CONS_INDEX 1
86 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
87 #define CONFIG_SERIAL1 /* UART1 */
89 /* allow to overwrite serial and ethaddr */
90 #define CONFIG_ENV_OVERWRITE
91 #define CONFIG_BAUDRATE 115200
92 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
95 #define CONFIG_OMAP_HSMMC
96 #define CONFIG_GENERIC_MMC
97 #define CONFIG_DOS_PARTITION
100 #define CONFIG_OMAP3_GPIO_5
101 #define CONFIG_USB_EHCI
102 #define CONFIG_USB_EHCI_OMAP
103 #define CONFIG_USB_ULPI
104 #define CONFIG_USB_ULPI_VIEWPORT_OMAP
105 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
106 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
107 #define CONFIG_USB_STORAGE
109 /* #define CONFIG_EHCI_DCACHE */
111 /* commands to include */
112 #include <config_cmd_default.h>
114 #define CONFIG_CMD_CACHE
115 #define CONFIG_CMD_DHCP
116 #define CONFIG_CMD_EXT2 /* EXT2 Support */
117 #define CONFIG_CMD_FAT /* FAT support */
118 #define CONFIG_CMD_GPIO
119 #define CONFIG_CMD_I2C /* I2C serial bus support */
120 #define CONFIG_CMD_MII
121 #define CONFIG_CMD_MMC /* MMC support */
122 #define CONFIG_CMD_NET
123 #define CONFIG_CMD_NFS
124 #define CONFIG_CMD_NAND /* NAND support */
125 #define CONFIG_CMD_PING
126 #define CONFIG_CMD_USB
127 #define CONFIG_CMD_EEPROM
129 #undef CONFIG_CMD_FLASH /* only NAND on the SOM */
130 #undef CONFIG_CMD_IMLS
132 #define CONFIG_SYS_NO_FLASH
133 #define CONFIG_HARD_I2C
134 #define CONFIG_SYS_I2C_SPEED 400000
135 #define CONFIG_SYS_I2C_SLAVE 1
136 #define CONFIG_SYS_I2C_BUS 0
137 #define CONFIG_SYS_I2C_BUS_SELECT 1
138 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
139 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
140 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
141 #define CONFIG_DRIVER_OMAP34XX_I2C
147 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
151 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
154 #define CONFIG_AUTO_COMPLETE
157 * Miscellaneous configurable options
159 #define CONFIG_SYS_LONGHELP /* undef to save memory */
160 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
161 #define CONFIG_CMDLINE_EDITING
162 #define CONFIG_AUTO_COMPLETE
163 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
165 /* Print Buffer Size */
166 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
167 sizeof(CONFIG_SYS_PROMPT) + 16)
168 #define CONFIG_SYS_MAXARGS 32 /* max number of command */
170 /* Boot Argument Buffer Size */
171 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
172 /* memtest works on */
173 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
174 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
175 0x01F00000) /* 31MB */
177 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
181 * AM3517 has 12 GP timers, they can be driven by the system clock
182 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
183 * This rate is divided by a local divisor.
185 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
186 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
187 #define CONFIG_SYS_HZ 1000
190 * Physical Memory Map
192 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
193 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
194 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
197 * FLASH and environment organization
200 /* **** PISMO SUPPORT *** */
202 /* Configure the PISMO */
203 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
205 #define CONFIG_NAND_OMAP_GPMC
206 #define GPMC_NAND_ECC_LP_x16_LAYOUT
207 #define CONFIG_ENV_IS_IN_NAND
208 #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
210 /* Redundant Environment */
211 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
212 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
213 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
214 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
215 2 * CONFIG_SYS_ENV_SECT_SIZE)
216 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
218 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
219 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
220 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
221 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
222 CONFIG_SYS_INIT_RAM_SIZE - \
223 GENERATED_GBL_DATA_SIZE)
226 * ethernet support, EMAC
229 #define CONFIG_DRIVER_TI_EMAC
230 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
232 #define CONFIG_EMAC_MDIO_PHY_NUM 0
233 #define CONFIG_BOOTP_DEFAULT
234 #define CONFIG_BOOTP_DNS
235 #define CONFIG_BOOTP_DNS2
236 #define CONFIG_BOOTP_SEND_HOSTNAME
237 #define CONFIG_NET_RETRY_COUNT 10
239 /* Defines for SPL */
241 #define CONFIG_SPL_FRAMEWORK
242 #define CONFIG_SPL_BOARD_INIT
243 #define CONFIG_SPL_CONSOLE
244 #define CONFIG_SPL_NAND_SIMPLE
245 #define CONFIG_SPL_NAND_SOFTECC
246 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
248 #define CONFIG_SPL_LIBCOMMON_SUPPORT
249 #define CONFIG_SPL_LIBDISK_SUPPORT
250 #define CONFIG_SPL_I2C_SUPPORT
251 #define CONFIG_SPL_LIBGENERIC_SUPPORT
252 #define CONFIG_SPL_SERIAL_SUPPORT
253 #define CONFIG_SPL_GPIO_SUPPORT
254 #define CONFIG_SPL_POWER_SUPPORT
255 #define CONFIG_SPL_NAND_SUPPORT
256 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
258 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
259 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
260 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
262 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
263 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
264 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
265 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
267 /* NAND boot config */
268 #define CONFIG_SYS_NAND_PAGE_COUNT 64
269 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
270 #define CONFIG_SYS_NAND_OOBSIZE 64
271 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
272 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
273 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
274 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
275 48, 49, 50, 51, 52, 53, 54, 55,\
276 56, 57, 58, 59, 60, 61, 62, 63}
277 #define CONFIG_SYS_NAND_ECCSIZE 256
278 #define CONFIG_SYS_NAND_ECCBYTES 3
280 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
282 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
283 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
285 #define CONFIG_OF_LIBFDT
287 #define CONFIG_CMD_UBI
288 #define CONFIG_CMD_UBIFS
289 #define CONFIG_RBTREE
291 #define CONFIG_MTD_PARTITIONS
292 #define CONFIG_MTD_DEVICE
293 #define CONFIG_CMD_MTDPARTS
295 /* Setup MTD for NAND on the SOM */
296 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
297 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
298 "1m(u-boot),256k(env1)," \
299 "256k(env2),6m(kernel),-(rootfs)"
301 #define CONFIG_TAM3517_SETTINGS \
303 "nandargs=setenv bootargs root=${nandroot} " \
304 "rootfstype=${nandrootfstype}\0" \
305 "nfsargs=setenv bootargs root=/dev/nfs rw " \
306 "nfsroot=${serverip}:${rootpath}\0" \
307 "ramargs=setenv bootargs root=/dev/ram rw\0" \
308 "addip_sta=setenv bootargs ${bootargs} " \
309 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
310 ":${hostname}:${netdev}:off panic=1\0" \
311 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
312 "addip=if test -n ${ipdyn};then run addip_dyn;" \
313 "else run addip_sta;fi\0" \
314 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
315 "addtty=setenv bootargs ${bootargs}" \
316 " console=ttyO0,${baudrate}\0" \
317 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
318 "loadaddr=82000000\0" \
319 "kernel_addr_r=82000000\0" \
320 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
321 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
322 "flash_self=run ramargs addip addtty addmtd addmisc;" \
323 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
324 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
325 "bootm ${kernel_addr}\0" \
326 "nandboot=run nandargs addip addtty addmtd addmisc;" \
327 "nand read ${kernel_addr_r} kernel\0" \
328 "bootm ${kernel_addr_r}\0" \
329 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
330 "run nfsargs addip addtty addmtd addmisc;" \
331 "bootm ${kernel_addr_r}\0" \
332 "net_self=if run net_self_load;then " \
333 "run ramargs addip addtty addmtd addmisc;" \
334 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
335 "else echo Images not loades;fi\0" \
336 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
337 "load=tftp ${loadaddr} ${u-boot}\0" \
338 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
339 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
340 "uboot_addr=0x80000\0" \
341 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
342 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
343 "updatemlo=nandecc hw;nand erase 0 20000;" \
344 "nand write ${loadaddr} 0 20000\0" \
345 "upd=if run load;then echo Updating u-boot;if run update;" \
346 "then echo U-Boot updated;" \
347 "else echo Error updating u-boot !;" \
348 "echo Board without bootloader !!;" \
350 "else echo U-Boot not downloaded..exiting;fi\0" \
354 * this is common code for all TAM3517 boards.
355 * MAC address is stored from manufacturer in
358 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
360 * The I2C EEPROM on the TAM3517 contains
361 * mac address and production data
363 struct tam3517_module_info {
368 * bit 0~47 : sequence number
369 * bit 48~55 : week of year, from 0.
372 unsigned long long sequence_number;
375 * bit 0~7 : revision fixed
376 * bit 8~15 : revision major
379 unsigned int revision;
380 unsigned char eth_addr[4][8];
381 unsigned char _rev[100];
384 #define TAM3517_READ_EEPROM(info, ret) \
386 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); \
387 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
388 (void *)info, sizeof(*info))) \
394 #define TAM3517_READ_MAC_FROM_EEPROM(info) \
396 char buf[80], ethname[20]; \
398 memset(buf, 0, sizeof(buf)); \
399 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \
400 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \
401 (info)->eth_addr[i][5], \
402 (info)->eth_addr[i][4], \
403 (info)->eth_addr[i][3], \
404 (info)->eth_addr[i][2], \
405 (info)->eth_addr[i][1], \
406 (info)->eth_addr[i][0]); \
409 sprintf(ethname, "eth%daddr", i); \
411 sprintf(ethname, "ethaddr"); \
412 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
413 setenv(ethname, buf); \
417 /* The following macros are taken from Technexion's documentation */
418 #define TAM3517_sequence_number(info) \
419 ((info)->sequence_number % 0x1000000000000LL)
420 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
421 #define TAM3517_year(info) ((info)->sequence_number >> 56)
422 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
423 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
424 #define TAM3517_revision_tn(info) ((info)->revision >> 16)
426 #define TAM3517_PRINT_SOM_INFO(info) \
428 printf("Vendor:%s\n", (info)->customer); \
429 printf("SOM: %s\n", (info)->product); \
430 printf("SeqNr: %02llu%02llu%012llu\n", \
431 TAM3517_year(info), \
432 TAM3517_week_of_year(info), \
433 TAM3517_sequence_number(info)); \
434 printf("Rev: TN%u %u.%u\n", \
435 TAM3517_revision_tn(info), \
436 TAM3517_revision_major(info), \
437 TAM3517_revision_fixed(info)); \
442 #endif /* __TAM3517_H */