include/configs/tam3517-common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2011
   4  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
   5  *
   6  * Copyright (C) 2009 TechNexion Ltd.
   7  */
   8
   9 #ifndef __TAM3517_H
  10 #define __TAM3517_H
  11
  12 /*
  13  * High Level Configuration Options
  14  */
  15
  16 #include <asm/arch/cpu.h>               /* get chip and board defs */
  17 #include <asm/arch/omap.h>
  18
  19 /* Clock Defines */
  20 #define V_OSCK                  26000000        /* Clock output from T2 */
  21 #define V_SCLK                  (V_OSCK >> 1)
  22
  23 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
  24 #define CONFIG_SETUP_MEMORY_TAGS
  25 #define CONFIG_INITRD_TAG
  26 #define CONFIG_REVISION_TAG
  27
  28 /*
  29  * Size of malloc() pool
  30  */
  31 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10) + \
  32                                         2 * 1024 * 1024)
  33 /*
  34  * DDR related
  35  */
  36 #define CONFIG_SYS_CS0_SIZE             (256 * 1024 * 1024)
  37
  38 /*
  39  * Hardware drivers
  40  */
  41
  42 /*
  43  * NS16550 Configuration
  44  */
  45 #define CONFIG_SYS_NS16550_SERIAL
  46 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  47 #define CONFIG_SYS_NS16550_CLK          48000000        /* 48MHz (APLL96/2) */
  48
  49 /*
  50  * select serial console configuration
  51  */
  52 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
  53
  54 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  55                                         115200}
  56 /* EHCI */
  57 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO        25
  58
  59 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW     0x07
  60
  61 /*
  62  * Board NAND Info.
  63  */
  64 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
  65                                                         /* to access */
  66                                                         /* nand at CS0 */
  67
  68 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of */
  69                                                         /* NAND devices */
  70
  71 /*
  72  * Miscellaneous configurable options
  73  */
  74 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
  75
  76 #define CONFIG_SYS_MAXARGS              32      /* max number of command */
  77                                                 /* args */
  78
  79 /*
  80  * AM3517 has 12 GP timers, they can be driven by the system clock
  81  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  82  * This rate is divided by a local divisor.
  83  */
  84 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
  85 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
  86
  87 /*
  88  * Physical Memory Map
  89  */
  90 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
  91 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
  92
  93 /*
  94  * FLASH and environment organization
  95  */
  96
  97 /* **** PISMO SUPPORT *** */
  98
  99 /* Redundant Environment */
 100 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 101
 102 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 103 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 104 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 105 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 106                                          CONFIG_SYS_INIT_RAM_SIZE - \
 107                                          GENERATED_GBL_DATA_SIZE)
 108
 109 /*
 110  * ethernet support, EMAC
 111  *
 112  */
 113 #define CONFIG_NET_RETRY_COUNT 10
 114
 115 /* Defines for SPL */
 116 #define CONFIG_SPL_CONSOLE
 117 #define CONFIG_SPL_NAND_SOFTECC
 118 #define CONFIG_SPL_NAND_WORKSPACE       0x8f07f000 /* below BSS */
 119
 120 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
 121                                          CONFIG_SPL_TEXT_BASE)
 122 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
 123
 124 #define CONFIG_SYS_SPL_MALLOC_START     0x8f000000
 125 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 126 #define CONFIG_SPL_BSS_START_ADDR       0x8f080000 /* end of RAM */
 127 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 128
 129 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME         "u-boot.img"
 130
 131 /* FAT */
 132 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME          "uImage"
 133 #define CONFIG_SPL_FS_LOAD_ARGS_NAME            "args"
 134
 135 /* RAW SD card / eMMC */
 136 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900   /* address 0x120000 */
 137 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR   0x80    /* address 0x10000 */
 138 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS  0x80    /* 64KiB */
 139
 140 /* NAND boot config */
 141 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 142 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 143 #define CONFIG_SYS_NAND_OOBSIZE         64
 144 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
 145 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 146 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
 147 #define CONFIG_SYS_NAND_ECCPOS          {40, 41, 42, 43, 44, 45, 46, 47,\
 148                                          48, 49, 50, 51, 52, 53, 54, 55,\
 149                                          56, 57, 58, 59, 60, 61, 62, 63}
 150 #define CONFIG_SYS_NAND_ECCSIZE         256
 151 #define CONFIG_SYS_NAND_ECCBYTES        3
 152 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_SW
 153
 154 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 155
 156 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 157 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x80000
 158
 159 /* Setup MTD for NAND on the SOM */
 160
 161 #define CONFIG_TAM3517_SETTINGS                                         \
 162         "netdev=eth0\0"                                                 \
 163         "nandargs=setenv bootargs root=${nandroot} "                    \
 164                 "rootfstype=${nandrootfstype}\0"                        \
 165         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 166                 "nfsroot=${serverip}:${rootpath}\0"                     \
 167         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 168         "addip_sta=setenv bootargs ${bootargs} "                        \
 169                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 170                 ":${hostname}:${netdev}:off panic=1\0"                  \
 171         "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"               \
 172         "addip=if test -n ${ipdyn};then run addip_dyn;"                 \
 173                 "else run addip_sta;fi\0"                               \
 174         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 175         "addtty=setenv bootargs ${bootargs}"                            \
 176                 " console=ttyO0,${baudrate}\0"                          \
 177         "addmisc=setenv bootargs ${bootargs} ${misc}\0"                 \
 178         "loadaddr=82000000\0"                                           \
 179         "kernel_addr_r=82000000\0"                                      \
 180         "hostname=" CONFIG_HOSTNAME "\0"                        \
 181         "bootfile=" CONFIG_HOSTNAME "/uImage\0"         \
 182         "flash_self=run ramargs addip addtty addmtd addmisc;"           \
 183                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 184         "flash_nfs=run nfsargs addip addtty addmtd addmisc;"            \
 185                 "bootm ${kernel_addr}\0"                                \
 186         "nandboot=run nandargs addip addtty addmtd addmisc;"            \
 187                 "nand read ${kernel_addr_r} kernel\0"                   \
 188                 "bootm ${kernel_addr_r}\0"                              \
 189         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
 190                 "run nfsargs addip addtty addmtd addmisc;"              \
 191                 "bootm ${kernel_addr_r}\0"                              \
 192         "net_self=if run net_self_load;then "                           \
 193                 "run ramargs addip addtty addmtd addmisc;"              \
 194                 "bootm ${kernel_addr_r} ${ramdisk_addr_r};"             \
 195                 "else echo Images not loades;fi\0"                      \
 196         "u-boot=" CONFIG_HOSTNAME "/u-boot.img\0"               \
 197         "load=tftp ${loadaddr} ${u-boot}\0"                             \
 198         "loadmlo=tftp ${loadaddr} ${mlo}\0"                             \
 199         "mlo=" CONFIG_HOSTNAME "/MLO\0"                 \
 200         "uboot_addr=0x80000\0"                                          \
 201         "update=nandecc sw;nand erase ${uboot_addr} 100000;"            \
 202                 "nand write ${loadaddr} ${uboot_addr} 80000\0"          \
 203         "updatemlo=nandecc hw;nand erase 0 20000;"                      \
 204                 "nand write ${loadaddr} 0 20000\0"                      \
 205         "upd=if run load;then echo Updating u-boot;if run update;"      \
 206                 "then echo U-Boot updated;"                             \
 207                         "else echo Error updating u-boot !;"            \
 208                         "echo Board without bootloader !!;"             \
 209                 "fi;"                                                   \
 210                 "else echo U-Boot not downloaded..exiting;fi\0"         \
 211
 212 /*
 213  * this is common code for all TAM3517 boards.
 214  * MAC address is stored from manufacturer in
 215  * I2C EEPROM
 216  */
 217 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 218 /*
 219  * The I2C EEPROM on the TAM3517 contains
 220  * mac address and production data
 221  */
 222 struct tam3517_module_info {
 223         char customer[48];
 224         char product[48];
 225
 226         /*
 227          * bit 0~47  : sequence number
 228          * bit 48~55 : week of year, from 0.
 229          * bit 56~63 : year
 230          */
 231         unsigned long long sequence_number;
 232
 233         /*
 234          * bit 0~7   : revision fixed
 235          * bit 8~15  : revision major
 236          * bit 16~31 : TNxxx
 237          */
 238         unsigned int revision;
 239         unsigned char eth_addr[4][8];
 240         unsigned char _rev[100];
 241 };
 242
 243 #define TAM3517_READ_EEPROM(info, ret) \
 244 do {                                                            \
 245         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); \
 246         if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,          \
 247                 (void *)info, sizeof(*info)))                   \
 248                 ret = 1;                                        \
 249         else                                                    \
 250                 ret = 0;                                        \
 251 } while (0)
 252
 253 #define TAM3517_READ_MAC_FROM_EEPROM(info)                      \
 254 do {                                                            \
 255         char buf[80], ethname[20];                              \
 256         int i;                                                  \
 257         memset(buf, 0, sizeof(buf));                            \
 258         for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) {   \
 259                 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X",   \
 260                         (info)->eth_addr[i][5],                 \
 261                         (info)->eth_addr[i][4],                 \
 262                         (info)->eth_addr[i][3],                 \
 263                         (info)->eth_addr[i][2],                 \
 264                         (info)->eth_addr[i][1],                 \
 265                         (info)->eth_addr[i][0]);                        \
 266                                                                 \
 267                 if (i)                                          \
 268                         sprintf(ethname, "eth%daddr", i);       \
 269                 else                                            \
 270                         strcpy(ethname, "ethaddr");             \
 271                 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
 272                 env_set(ethname, buf);                          \
 273         }                                                       \
 274 } while (0)
 275
 276 /* The following macros are taken from Technexion's documentation */
 277 #define TAM3517_sequence_number(info) \
 278         ((info)->sequence_number % 0x1000000000000LL)
 279 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
 280 #define TAM3517_year(info) ((info)->sequence_number >> 56)
 281 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
 282 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
 283 #define TAM3517_revision_tn(info) ((info)->revision >> 16)
 284
 285 #define TAM3517_PRINT_SOM_INFO(info)                            \
 286 do {                                                            \
 287         printf("Vendor:%s\n", (info)->customer);                \
 288         printf("SOM:   %s\n", (info)->product);                 \
 289         printf("SeqNr: %02llu%02llu%012llu\n",                  \
 290                 TAM3517_year(info),                             \
 291                 TAM3517_week_of_year(info),                     \
 292                 TAM3517_sequence_number(info));                 \
 293         printf("Rev:   TN%u %u.%u\n",                           \
 294                 TAM3517_revision_tn(info),                      \
 295                 TAM3517_revision_major(info),                   \
 296                 TAM3517_revision_fixed(info));                  \
 297 } while (0)
 298
 299 #endif
 300
 301 #endif /* __TAM3517_H */