1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
6 * Copyright (C) 2009 TechNexion Ltd.
13 * High Level Configuration Options
16 #include <asm/arch/cpu.h> /* get chip and board defs */
17 #include <asm/arch/omap.h>
20 #define V_OSCK 26000000 /* Clock output from T2 */
21 #define V_SCLK (V_OSCK >> 1)
23 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
24 #define CONFIG_SETUP_MEMORY_TAGS
25 #define CONFIG_INITRD_TAG
26 #define CONFIG_REVISION_TAG
29 * Size of malloc() pool
31 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
36 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
43 * NS16550 Configuration
45 #define CONFIG_SYS_NS16550_SERIAL
46 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
47 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
50 * select serial console configuration
52 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
54 /* allow to overwrite serial and ethaddr */
55 #define CONFIG_ENV_OVERWRITE
56 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
59 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
61 #define CONFIG_SYS_I2C
62 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
63 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
64 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
69 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
73 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
77 * Miscellaneous configurable options
79 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
81 #define CONFIG_SYS_MAXARGS 32 /* max number of command */
83 /* memtest works on */
85 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
89 * AM3517 has 12 GP timers, they can be driven by the system clock
90 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
91 * This rate is divided by a local divisor.
93 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
94 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
99 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
100 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
103 * FLASH and environment organization
106 /* **** PISMO SUPPORT *** */
108 /* Redundant Environment */
109 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
111 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
112 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
113 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
114 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
115 CONFIG_SYS_INIT_RAM_SIZE - \
116 GENERATED_GBL_DATA_SIZE)
119 * ethernet support, EMAC
122 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
123 #define CONFIG_BOOTP_SEND_HOSTNAME
124 #define CONFIG_NET_RETRY_COUNT 10
126 /* Defines for SPL */
127 #define CONFIG_SPL_CONSOLE
128 #define CONFIG_SPL_NAND_SOFTECC
129 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
131 #define CONFIG_SPL_NAND_BASE
132 #define CONFIG_SPL_NAND_DRIVERS
133 #define CONFIG_SPL_NAND_ECC
135 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
136 CONFIG_SPL_TEXT_BASE)
137 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
139 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
140 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
141 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
142 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
144 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
145 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
148 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
149 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
151 /* RAW SD card / eMMC */
152 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
153 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
154 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
156 /* NAND boot config */
157 #define CONFIG_SYS_NAND_PAGE_COUNT 64
158 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
159 #define CONFIG_SYS_NAND_OOBSIZE 64
160 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
161 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
162 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
163 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
164 48, 49, 50, 51, 52, 53, 54, 55,\
165 56, 57, 58, 59, 60, 61, 62, 63}
166 #define CONFIG_SYS_NAND_ECCSIZE 256
167 #define CONFIG_SYS_NAND_ECCBYTES 3
168 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
170 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
172 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
173 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
175 /* Setup MTD for NAND on the SOM */
177 #define CONFIG_TAM3517_SETTINGS \
179 "nandargs=setenv bootargs root=${nandroot} " \
180 "rootfstype=${nandrootfstype}\0" \
181 "nfsargs=setenv bootargs root=/dev/nfs rw " \
182 "nfsroot=${serverip}:${rootpath}\0" \
183 "ramargs=setenv bootargs root=/dev/ram rw\0" \
184 "addip_sta=setenv bootargs ${bootargs} " \
185 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
186 ":${hostname}:${netdev}:off panic=1\0" \
187 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
188 "addip=if test -n ${ipdyn};then run addip_dyn;" \
189 "else run addip_sta;fi\0" \
190 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
191 "addtty=setenv bootargs ${bootargs}" \
192 " console=ttyO0,${baudrate}\0" \
193 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
194 "loadaddr=82000000\0" \
195 "kernel_addr_r=82000000\0" \
196 "hostname=" CONFIG_HOSTNAME "\0" \
197 "bootfile=" CONFIG_HOSTNAME "/uImage\0" \
198 "flash_self=run ramargs addip addtty addmtd addmisc;" \
199 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
200 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
201 "bootm ${kernel_addr}\0" \
202 "nandboot=run nandargs addip addtty addmtd addmisc;" \
203 "nand read ${kernel_addr_r} kernel\0" \
204 "bootm ${kernel_addr_r}\0" \
205 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
206 "run nfsargs addip addtty addmtd addmisc;" \
207 "bootm ${kernel_addr_r}\0" \
208 "net_self=if run net_self_load;then " \
209 "run ramargs addip addtty addmtd addmisc;" \
210 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
211 "else echo Images not loades;fi\0" \
212 "u-boot=" CONFIG_HOSTNAME "/u-boot.img\0" \
213 "load=tftp ${loadaddr} ${u-boot}\0" \
214 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
215 "mlo=" CONFIG_HOSTNAME "/MLO\0" \
216 "uboot_addr=0x80000\0" \
217 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
218 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
219 "updatemlo=nandecc hw;nand erase 0 20000;" \
220 "nand write ${loadaddr} 0 20000\0" \
221 "upd=if run load;then echo Updating u-boot;if run update;" \
222 "then echo U-Boot updated;" \
223 "else echo Error updating u-boot !;" \
224 "echo Board without bootloader !!;" \
226 "else echo U-Boot not downloaded..exiting;fi\0" \
229 * this is common code for all TAM3517 boards.
230 * MAC address is stored from manufacturer in
233 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
235 * The I2C EEPROM on the TAM3517 contains
236 * mac address and production data
238 struct tam3517_module_info {
243 * bit 0~47 : sequence number
244 * bit 48~55 : week of year, from 0.
247 unsigned long long sequence_number;
250 * bit 0~7 : revision fixed
251 * bit 8~15 : revision major
254 unsigned int revision;
255 unsigned char eth_addr[4][8];
256 unsigned char _rev[100];
259 #define TAM3517_READ_EEPROM(info, ret) \
261 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
262 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
263 (void *)info, sizeof(*info))) \
269 #define TAM3517_READ_MAC_FROM_EEPROM(info) \
271 char buf[80], ethname[20]; \
273 memset(buf, 0, sizeof(buf)); \
274 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \
275 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \
276 (info)->eth_addr[i][5], \
277 (info)->eth_addr[i][4], \
278 (info)->eth_addr[i][3], \
279 (info)->eth_addr[i][2], \
280 (info)->eth_addr[i][1], \
281 (info)->eth_addr[i][0]); \
284 sprintf(ethname, "eth%daddr", i); \
286 strcpy(ethname, "ethaddr"); \
287 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
288 env_set(ethname, buf); \
292 /* The following macros are taken from Technexion's documentation */
293 #define TAM3517_sequence_number(info) \
294 ((info)->sequence_number % 0x1000000000000LL)
295 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
296 #define TAM3517_year(info) ((info)->sequence_number >> 56)
297 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
298 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
299 #define TAM3517_revision_tn(info) ((info)->revision >> 16)
301 #define TAM3517_PRINT_SOM_INFO(info) \
303 printf("Vendor:%s\n", (info)->customer); \
304 printf("SOM: %s\n", (info)->product); \
305 printf("SeqNr: %02llu%02llu%012llu\n", \
306 TAM3517_year(info), \
307 TAM3517_week_of_year(info), \
308 TAM3517_sequence_number(info)); \
309 printf("Rev: TN%u %u.%u\n", \
310 TAM3517_revision_tn(info), \
311 TAM3517_revision_major(info), \
312 TAM3517_revision_fixed(info)); \
317 #endif /* __TAM3517_H */