2 * Copyright (C) 2006 Freescale Semiconductor, Inc.
3 * Dave Liu <daveliu@freescale.com>
5 * Copyright (C) 2007 Logic Product Development, Inc.
6 * Peter Barada <peterb@logicpd.com>
8 * Copyright (C) 2007 MontaVista Software, Inc.
9 * Anton Vorontsov <avorontsov@ru.mvista.com>
12 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
24 * High Level Configuration Options
27 /* This needs to be set prior to including km/km83xx-common.h */
28 #define CONFIG_SYS_TEXT_BASE 0xF0000000
30 #if defined(CONFIG_SUVD3) /* SUVD3 board specific */
31 #define CONFIG_HOSTNAME suvd3
32 #define CONFIG_KM_BOARD_NAME "suvd3"
33 /* include common defines/options for all 8321 Keymile boards */
34 #include "km/km8321-common.h"
35 #elif defined(CONFIG_KMVECT1) /* VECT1 board specific */
36 #define CONFIG_HOSTNAME kmvect1
37 #define CONFIG_KM_BOARD_NAME "kmvect1"
38 /* include common defines/options for all 8309 Keymile boards */
39 #include "km/km8309-common.h"
41 #error Supported boards are: SUVD3, KMVECT1
44 #define CONFIG_SYS_APP1_BASE 0xA0000000
45 #define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */
46 #define CONFIG_SYS_APP2_BASE 0xB0000000
47 #define CONFIG_SYS_APP2_SIZE 256 /* Megabytes */
50 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
53 * Init Local Bus Memory Controller:
55 * Bank Bus Machine PortSz Size Device
56 * ---- --- ------- ------ ----- ------
57 * 2 Local UPMA 16 bit 256MB APP1
58 * 3 Local GPCM 16 bit 256MB APP2
63 * APP1 on the local bus CS2
65 #define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_APP1_BASE
66 #define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
68 #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \
72 #define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_APP1_SIZE))
74 #define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE | \
78 #define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
84 #define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \
88 #define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE
89 #define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
96 /* APP1: icache cacheable, but dcache-inhibit and guarded */
97 #define CONFIG_SYS_IBAT5L (CONFIG_SYS_APP1_BASE | BATL_PP_RW | \
99 #define CONFIG_SYS_IBAT5U (CONFIG_SYS_APP1_BASE | BATU_BL_256M | \
101 #define CONFIG_SYS_DBAT5L (CONFIG_SYS_APP1_BASE | BATL_PP_RW | \
102 BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
103 #define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
105 #define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | BATL_PP_RW | \
107 #define CONFIG_SYS_IBAT6U (CONFIG_SYS_APP2_BASE | BATU_BL_256M | \
109 #define CONFIG_SYS_DBAT6L (CONFIG_SYS_APP2_BASE | BATL_PP_RW | \
110 BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
111 #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
113 #endif /* __CONFIG_H */