2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
8 * Configuration settings for the Allwinner sunxi series of boards.
10 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef _SUNXI_COMMON_CONFIG_H
14 #define _SUNXI_COMMON_CONFIG_H
17 * High Level Configuration Options
19 #define CONFIG_SUNXI /* sunxi family */
21 #include <asm/arch/cpu.h> /* get chip and board defs */
23 #define CONFIG_SYS_TEXT_BASE 0x4a000000
26 * Display CPU information
28 #define CONFIG_DISPLAY_CPUINFO
30 /* Serial & console */
31 #define CONFIG_SYS_NS16550
32 #define CONFIG_SYS_NS16550_SERIAL
33 /* ns16550 reg in the low bits of cpu reg */
34 #define CONFIG_SYS_NS16550_REG_SIZE -4
35 #define CONFIG_SYS_NS16550_CLK 24000000
36 #define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
37 #define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
38 #define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
39 #define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
42 #define CONFIG_SYS_SDRAM_BASE 0x40000000
43 #define CONFIG_SYS_INIT_RAM_ADDR 0x0
44 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
46 #define CONFIG_SYS_INIT_SP_OFFSET \
47 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
48 #define CONFIG_SYS_INIT_SP_ADDR \
49 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
51 #define CONFIG_NR_DRAM_BANKS 1
52 #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
53 #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
55 #define CONFIG_CMD_MEMORY
56 #define CONFIG_CMD_SETEXPR
58 #define CONFIG_SETUP_MEMORY_TAGS
59 #define CONFIG_CMDLINE_TAG
60 #define CONFIG_INITRD_TAG
62 /* 4MB of malloc() pool */
63 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
66 * Miscellaneous configurable options
68 #define CONFIG_CMD_ECHO
69 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
70 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
71 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
72 #define CONFIG_SYS_GENERIC_BOARD
74 /* Boot Argument Buffer Size */
75 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
77 #define CONFIG_SYS_LOAD_ADDR 0x48000000 /* default load address */
79 /* standalone support */
80 #define CONFIG_STANDALONE_LOAD_ADDR 0x48000000
82 #define CONFIG_SYS_HZ 1000
85 #define CONFIG_BAUDRATE 115200
87 /* The stack sizes are set up in start.S using the settings below */
88 #define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
90 /* FLASH and environment organization */
92 #define CONFIG_SYS_NO_FLASH
94 #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* 512 KiB */
95 #define CONFIG_IDENT_STRING " Allwinner Technology"
97 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
99 #define CONFIG_EXTRA_ENV_SETTINGS \
100 "bootm_size=0x10000000\0"
102 #define CONFIG_SYS_BOOT_GET_CMDLINE
104 #include <config_cmd_default.h>
106 #define CONFIG_FAT_WRITE /* enable write access */
108 #define CONFIG_SPL_FRAMEWORK
109 #define CONFIG_SPL_LIBCOMMON_SUPPORT
110 #define CONFIG_SPL_SERIAL_SUPPORT
111 #define CONFIG_SPL_LIBGENERIC_SUPPORT
114 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds"
115 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi"
116 #define CONFIG_SPL_TEXT_BASE 0x2000
117 #define CONFIG_SPL_MAX_SIZE 0x4000 /* 16 KiB */
118 /* end of 32 KiB in sram */
119 #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
120 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
121 #define CONFIG_SYS_SPL_MALLOC_START 0x4ff00000
122 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 /* 512 KiB */
124 #undef CONFIG_CMD_FPGA
125 #undef CONFIG_CMD_NET
126 #undef CONFIG_CMD_NFS
128 #define CONFIG_CONS_INDEX 1 /* UART0 */
130 #if !defined CONFIG_ENV_IS_IN_MMC && \
131 !defined CONFIG_ENV_IS_IN_NAND && \
132 !defined CONFIG_ENV_IS_IN_FAT && \
133 !defined CONFIG_ENV_IS_IN_SPI_FLASH
134 #define CONFIG_ENV_IS_NOWHERE
137 #ifndef CONFIG_SPL_BUILD
138 #include <config_distro_defaults.h>
141 #endif /* _SUNXI_COMMON_CONFIG_H */