1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2014, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
7 #ifndef __CONFIG_STV0991_H
8 #define __CONFIG_STV0991_H
9 #define CONFIG_SYS_DCACHE_OFF
10 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
12 /* ram memory-related information */
13 #define CONFIG_NR_DRAM_BANKS 1
14 #define PHYS_SDRAM_1 0x00000000
15 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
16 #define PHYS_SDRAM_1_SIZE 0x00198000
18 #define CONFIG_ENV_SIZE 0x10000
19 #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
20 #define CONFIG_ENV_OFFSET 0x30000
21 #define CONFIG_ENV_ADDR \
22 (PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE)
23 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024)
26 #define CONFIG_SYS_CBSIZE 1024
29 #define CONFIG_SYS_LOAD_ADDR 0x00000000
30 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000
31 #define CONFIG_SYS_INIT_RAM_ADDR 0x00190000
32 #define CONFIG_SYS_INIT_SP_OFFSET \
33 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
34 /* U-Boot Load Address */
35 #define CONFIG_SYS_INIT_SP_ADDR \
36 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
38 /* GMAC related configs */
41 #define CONFIG_DW_ALTDESCRIPTOR
43 /* Command support defines */
44 #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
46 #define CONFIG_SYS_MEMTEST_START 0x0000
47 #define CONFIG_SYS_MEMTEST_END 1024*1024
49 /* Misc configuration */
51 #define CONFIG_BOOTCOMMAND "go 0x40040000"
56 #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */
57 #define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000
61 #endif /* __CONFIG_H */