1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Sysam stmark2 board configuration
5 * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
8 #ifndef __STMARK2_CONFIG_H
9 #define __STMARK2_CONFIG_H
11 #define CONFIG_HOSTNAME "stmark2"
13 #define CONFIG_SYS_UART_PORT 0
15 #define LDS_BOARD_TEXT \
16 board/sysam/stmark2/sbf_dram_init.o (.text*)
18 #define CONFIG_TIMESTAMP
20 #define CONFIG_EXTRA_ENV_SETTINGS \
21 "kern_size=0x700000\0" \
22 "loadaddr=0x40001000\0" \
24 "update_uboot=loady ${loadaddr}; " \
25 "sf probe 0:1 50000000; " \
26 "sf erase 0 0x80000; " \
27 "sf write ${loadaddr} 0 ${filesize}\0" \
28 "update_kernel=loady ${loadaddr}; " \
29 "setenv kern_size ${filesize}; saveenv; " \
30 "sf probe 0:1 50000000; " \
31 "sf erase 0x100000 0x700000; " \
32 "sf write ${loadaddr} 0x100000 ${filesize}\0" \
33 "update_rootfs=loady ${loadaddr}; " \
34 "sf probe 0:1 50000000; " \
35 "sf erase 0x00800000 0x100000; " \
36 "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
41 #define CONFIG_RTC_MCFRRTC
42 #define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000
47 /* DSPI and Serial Flash */
48 #define CONFIG_CF_DSPI
49 #define CONFIG_SERIAL_FLASH
51 #define CONFIG_SYS_SBFHDR_SIZE 0x7
53 /* Input, PCI, Flexbus, and VCO */
54 #define CONFIG_EXTRA_CLOCK
56 #define CONFIG_PRAM 2048 /* 2048 KB */
57 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
59 /* Print Buffer Size */
60 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
61 sizeof(CONFIG_SYS_PROMPT) + 16)
62 #define CONFIG_SYS_MAXARGS 16
63 /* Boot Argument Buffer Size */
64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
66 #define CONFIG_SYS_MBAR 0xFC000000
69 * Definitions for initial stack pointer and data area (in internal SRAM)
71 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
72 /* End of used area in internal SRAM */
73 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000
74 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
75 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \
76 GENERATED_GBL_DATA_SIZE) - 32)
77 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
78 #define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
81 * Start addresses for the final memory configuration
82 * (Set up by the startup code)
83 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
85 #define CONFIG_SYS_SDRAM_BASE 0x40000000
86 #define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */
88 #define CONFIG_SYS_DRAM_TEST
90 #if defined(CONFIG_CF_SBF)
91 #define CONFIG_SERIAL_BOOT
94 #if defined(CONFIG_SERIAL_BOOT)
95 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
97 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
100 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
101 /* Reserve 256 kB for Monitor */
102 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
105 * For booting Linux, the board info and command line data
106 * have to be in the first 8 MB of memory, since this is
107 * the maximum mapped by the Linux kernel during initialization ??
109 /* Initial Memory map for Linux */
110 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
111 (CONFIG_SYS_SDRAM_SIZE << 20))
113 /* Configuration for environment
114 * Environment is embedded in u-boot in the second sector of the flash
117 /* Cache Configuration */
118 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
119 CONFIG_SYS_INIT_RAM_SIZE - 8)
120 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
121 CONFIG_SYS_INIT_RAM_SIZE - 4)
122 #define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA)
123 #define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA)
124 #define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \
125 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
126 CF_ACR_EN | CF_ACR_SM_ALL)
127 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \
128 CF_CACR_ICINVA | CF_CACR_EUSP)
129 #define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR | \
130 CF_CACR_DEC | CF_CACR_DDCM_P | \
131 CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
133 #define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
134 CONFIG_SYS_INIT_RAM_SIZE - 12)
137 #define CONFIG_MII_INIT 1
138 #define CONFIG_SYS_DISCOVER_PHY
139 #define CONFIG_SYS_RX_ETH_BUFFER 8
140 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
141 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
142 #ifndef CONFIG_SYS_DISCOVER_PHY
143 #define FECDUPLEX FULL
144 #define FECSPEED _100BASET
146 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
147 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
149 #endif /* CONFIG_SYS_DISCOVER_PHY */
151 #endif /* __STMARK2_CONFIG_H */