1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Sysam stmark2 board configuration
5 * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
8 #ifndef __STMARK2_CONFIG_H
9 #define __STMARK2_CONFIG_H
11 #define CONFIG_HOSTNAME "stmark2"
13 #define CONFIG_MCFUART
14 #define CONFIG_SYS_UART_PORT 0
15 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
17 #define LDS_BOARD_TEXT \
18 board/sysam/stmark2/sbf_dram_init.o (.text*)
20 #define CONFIG_TIMESTAMP
22 #define CONFIG_BOOTARGS \
23 "console=ttyS0,115200 root=/dev/ram0 rw " \
28 #define CONFIG_BOOTCOMMAND \
29 "sf probe 0:1 50000000; " \
30 "sf read ${loadaddr} 0x100000 ${kern_size}; " \
33 #define CONFIG_EXTRA_ENV_SETTINGS \
34 "kern_size=0x700000\0" \
35 "loadaddr=0x40001000\0" \
37 "update_uboot=loady ${loadaddr}; " \
38 "sf probe 0:1 50000000; " \
39 "sf erase 0 0x80000; " \
40 "sf write ${loadaddr} 0 ${filesize}\0" \
41 "update_kernel=loady ${loadaddr}; " \
42 "setenv kern_size ${filesize}; saveenv; " \
43 "sf probe 0:1 50000000; " \
44 "sf erase 0x100000 0x700000; " \
45 "sf write ${loadaddr} 0x100000 ${filesize}\0" \
46 "update_rootfs=loady ${loadaddr}; " \
47 "sf probe 0:1 50000000; " \
48 "sf erase 0x00800000 0x100000; " \
49 "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
54 #define CONFIG_RTC_MCFRRTC
55 #define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000
57 /* spi not partitions */
58 #define CONFIG_JFFS2_CMDLINE
59 #define CONFIG_JFFS2_DEV "nor0"
65 /* DSPI and Serial Flash */
66 #define CONFIG_CF_DSPI
67 #define CONFIG_SF_DEFAULT_SPEED 50000000
68 #define CONFIG_SERIAL_FLASH
69 #define CONFIG_HARD_SPI
70 #define CONFIG_SPI_FLASH_ISSI
71 #define CONFIG_ENV_SPI_BUS 0
72 #define CONFIG_ENV_SPI_CS 1
74 #define CONFIG_SYS_SBFHDR_SIZE 0x7
76 #define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \
77 DSPI_CTAR_PCSSCK_1CLK | \
80 DSPI_CTAR_CSSCK(0) | \
84 #define CONFIG_SYS_DSPI_CTAR1 (CONFIG_SYS_DSPI_CTAR0)
85 #define CONFIG_SYS_DSPI_CTAR2 (CONFIG_SYS_DSPI_CTAR0)
87 /* Input, PCI, Flexbus, and VCO */
88 #define CONFIG_EXTRA_CLOCK
90 #define CONFIG_PRAM 2048 /* 2048 KB */
91 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
93 /* Print Buffer Size */
94 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
95 sizeof(CONFIG_SYS_PROMPT) + 16)
96 #define CONFIG_SYS_MAXARGS 16
97 /* Boot Argument Buffer Size */
98 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
100 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
101 #define CONFIG_SYS_MBAR 0xFC000000
104 * Definitions for initial stack pointer and data area (in internal SRAM)
106 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
107 /* End of used area in internal SRAM */
108 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000
109 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
110 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \
111 GENERATED_GBL_DATA_SIZE) - 32)
112 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
113 #define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
116 * Start addresses for the final memory configuration
117 * (Set up by the startup code)
118 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
120 #define CONFIG_SYS_SDRAM_BASE 0x40000000
121 #define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */
123 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x400)
124 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
125 #define CONFIG_SYS_DRAM_TEST
127 #if defined(CONFIG_CF_SBF)
128 #define CONFIG_SERIAL_BOOT
131 #if defined(CONFIG_SERIAL_BOOT)
132 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
134 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
137 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
138 /* Reserve 256 kB for Monitor */
139 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
140 /* Reserve 256 kB for malloc() */
141 #define CONFIG_SYS_MALLOC_LEN (256 << 10)
144 * For booting Linux, the board info and command line data
145 * have to be in the first 8 MB of memory, since this is
146 * the maximum mapped by the Linux kernel during initialization ??
148 /* Initial Memory map for Linux */
149 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
150 (CONFIG_SYS_SDRAM_SIZE << 20))
152 /* Configuration for environment
153 * Environment is embedded in u-boot in the second sector of the flash
156 #if defined(CONFIG_CF_SBF)
157 #define CONFIG_ENV_IS_IN_SPI_FLASH 1
158 #define CONFIG_ENV_SPI_CS 1
159 #define CONFIG_ENV_OFFSET 0x40000
160 #define CONFIG_ENV_SIZE 0x2000
161 #define CONFIG_ENV_SECT_SIZE 0x10000
164 #undef CONFIG_ENV_OVERWRITE
166 /* Cache Configuration */
167 #define CONFIG_SYS_CACHELINE_SIZE 16
168 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
169 CONFIG_SYS_INIT_RAM_SIZE - 8)
170 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
171 CONFIG_SYS_INIT_RAM_SIZE - 4)
172 #define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA)
173 #define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA)
174 #define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \
175 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
176 CF_ACR_EN | CF_ACR_SM_ALL)
177 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \
178 CF_CACR_ICINVA | CF_CACR_EUSP)
179 #define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR | \
180 CF_CACR_DEC | CF_CACR_DDCM_P | \
181 CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
183 #define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
184 CONFIG_SYS_INIT_RAM_SIZE - 12)
186 #endif /* __STMARK2_CONFIG_H */