Merge branch '2020-12-02-master-imports'
[platform/kernel/u-boot.git] / include / configs / stmark2.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Sysam stmark2 board configuration
4  *
5  * (C) Copyright 2017  Angelo Dureghello <angelo@sysam.it>
6  */
7
8 #ifndef __STMARK2_CONFIG_H
9 #define __STMARK2_CONFIG_H
10
11 #define CONFIG_HOSTNAME                 "stmark2"
12
13 #define CONFIG_MCFUART
14 #define CONFIG_SYS_UART_PORT            0
15 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600 , 19200 , 38400 , 57600, 115200 }
16
17 #define LDS_BOARD_TEXT                                          \
18         board/sysam/stmark2/sbf_dram_init.o (.text*)
19
20 #define CONFIG_TIMESTAMP
21
22 #define CONFIG_BOOTCOMMAND                                      \
23         "sf probe 0:1 50000000; "                               \
24         "sf read ${loadaddr} 0x100000 ${kern_size}; "           \
25         "bootm ${loadaddr}"
26
27 #define CONFIG_EXTRA_ENV_SETTINGS                               \
28         "kern_size=0x700000\0"                                  \
29         "loadaddr=0x40001000\0"                                 \
30                 "-(rootfs)\0"                                   \
31         "update_uboot=loady ${loadaddr}; "                      \
32                 "sf probe 0:1 50000000; "                       \
33                 "sf erase 0 0x80000; "                          \
34                 "sf write ${loadaddr} 0 ${filesize}\0"          \
35         "update_kernel=loady ${loadaddr}; "                     \
36                 "setenv kern_size ${filesize}; saveenv; "       \
37                 "sf probe 0:1 50000000; "                       \
38                 "sf erase 0x100000 0x700000; "                  \
39                 "sf write ${loadaddr} 0x100000 ${filesize}\0"   \
40         "update_rootfs=loady ${loadaddr}; "                     \
41                 "sf probe 0:1 50000000; "                       \
42                 "sf erase 0x00800000 0x100000; "                \
43                 "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
44         ""
45
46 /* Realtime clock */
47 #undef CONFIG_MCFRTC
48 #define CONFIG_RTC_MCFRRTC
49 #define CONFIG_SYS_MCFRRTC_BASE         0xFC0A8000
50
51 /* spi not partitions */
52 #define CONFIG_JFFS2_DEV                "nor0"
53
54 /* Timer */
55 #define CONFIG_MCFTMR
56
57 /* DSPI and Serial Flash */
58 #define CONFIG_CF_DSPI
59 #define CONFIG_SERIAL_FLASH
60
61 #define CONFIG_SYS_SBFHDR_SIZE          0x7
62
63 /* Input, PCI, Flexbus, and VCO */
64 #define CONFIG_EXTRA_CLOCK
65
66 #define CONFIG_PRAM                     2048    /* 2048 KB */
67 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
68
69 /* Print Buffer Size */
70 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
71                                         sizeof(CONFIG_SYS_PROMPT) + 16)
72 #define CONFIG_SYS_MAXARGS              16
73 /* Boot Argument Buffer Size    */
74 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
75
76 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x10000)
77 #define CONFIG_SYS_MBAR                 0xFC000000
78
79 /*
80  * Definitions for initial stack pointer and data area (in internal SRAM)
81  */
82 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
83 /* End of used area in internal SRAM */
84 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000
85 #define CONFIG_SYS_INIT_RAM_CTRL        0x221
86 #define CONFIG_SYS_GBL_DATA_OFFSET      ((CONFIG_SYS_INIT_RAM_SIZE - \
87                                         GENERATED_GBL_DATA_SIZE) - 32)
88 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
89 #define CONFIG_SYS_SBFHDR_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_SIZE - 32)
90
91 /*
92  * Start addresses for the final memory configuration
93  * (Set up by the startup code)
94  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
95  */
96 #define CONFIG_SYS_SDRAM_BASE           0x40000000
97 #define CONFIG_SYS_SDRAM_SIZE           128     /* SDRAM size in MB */
98
99 #define CONFIG_SYS_DRAM_TEST
100
101 #if defined(CONFIG_CF_SBF)
102 #define CONFIG_SERIAL_BOOT
103 #endif
104
105 #if defined(CONFIG_SERIAL_BOOT)
106 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_TEXT_BASE + 0x400)
107 #else
108 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_FLASH_BASE + 0x400)
109 #endif
110
111 #define CONFIG_SYS_BOOTPARAMS_LEN       (64 * 1024)
112 /* Reserve 256 kB for Monitor */
113 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
114 /* Reserve 256 kB for malloc() */
115 #define CONFIG_SYS_MALLOC_LEN           (256 << 10)
116
117 /*
118  * For booting Linux, the board info and command line data
119  * have to be in the first 8 MB of memory, since this is
120  * the maximum mapped by the Linux kernel during initialization ??
121  */
122 /* Initial Memory map for Linux */
123 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + \
124                                         (CONFIG_SYS_SDRAM_SIZE << 20))
125
126 /* Configuration for environment
127  * Environment is embedded in u-boot in the second sector of the flash
128  */
129
130 #if defined(CONFIG_CF_SBF)
131 #define CONFIG_ENV_IS_IN_SPI_FLASH      1
132 #endif
133
134 /* Cache Configuration */
135 #define CONFIG_SYS_CACHELINE_SIZE       16
136 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
137                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
138 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
139                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
140 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_BCINVA + CF_CACR_ICINVA)
141 #define CONFIG_SYS_DCACHE_INV           (CF_CACR_DCINVA)
142 #define CONFIG_SYS_CACHE_ACR2           (CONFIG_SYS_SDRAM_BASE | \
143                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
144                                          CF_ACR_EN | CF_ACR_SM_ALL)
145 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_BEC | CF_CACR_IEC | \
146                                          CF_CACR_ICINVA | CF_CACR_EUSP)
147 #define CONFIG_SYS_CACHE_DCACR          ((CONFIG_SYS_CACHE_ICACR | \
148                                          CF_CACR_DEC | CF_CACR_DDCM_P | \
149                                          CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
150
151 #define CACR_STATUS                     (CONFIG_SYS_INIT_RAM_ADDR + \
152                                         CONFIG_SYS_INIT_RAM_SIZE - 12)
153
154 #ifdef CONFIG_MCFFEC
155 #define CONFIG_MII_INIT                 1
156 #define CONFIG_SYS_DISCOVER_PHY
157 #define CONFIG_SYS_RX_ETH_BUFFER        8
158 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
159 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
160 #ifndef CONFIG_SYS_DISCOVER_PHY
161 #define FECDUPLEX                       FULL
162 #define FECSPEED                        _100BASET
163 #else
164 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
165 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
166 #endif
167 #endif /* CONFIG_SYS_DISCOVER_PHY */
168 #endif
169 #endif /* __STMARK2_CONFIG_H */