1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Sysam stmark2 board configuration
5 * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
8 #ifndef __STMARK2_CONFIG_H
9 #define __STMARK2_CONFIG_H
11 #define CONFIG_HOSTNAME "stmark2"
13 #define CONFIG_SYS_UART_PORT 0
15 #define LDS_BOARD_TEXT \
16 board/sysam/stmark2/sbf_dram_init.o (.text*)
18 #define CONFIG_EXTRA_ENV_SETTINGS \
19 "kern_size=0x700000\0" \
20 "loadaddr=0x40001000\0" \
22 "update_uboot=loady ${loadaddr}; " \
23 "sf probe 0:1 50000000; " \
24 "sf erase 0 0x80000; " \
25 "sf write ${loadaddr} 0 ${filesize}\0" \
26 "update_kernel=loady ${loadaddr}; " \
27 "setenv kern_size ${filesize}; saveenv; " \
28 "sf probe 0:1 50000000; " \
29 "sf erase 0x100000 0x700000; " \
30 "sf write ${loadaddr} 0x100000 ${filesize}\0" \
31 "update_rootfs=loady ${loadaddr}; " \
32 "sf probe 0:1 50000000; " \
33 "sf erase 0x00800000 0x100000; " \
34 "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
38 #define CONFIG_RTC_MCFRRTC
39 #define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000
41 #define CONFIG_SYS_SBFHDR_SIZE 0x7
43 /* Input, PCI, Flexbus, and VCO */
44 #define CONFIG_EXTRA_CLOCK
46 #define CONFIG_PRAM 2048 /* 2048 KB */
47 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
49 /* Print Buffer Size */
50 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
51 sizeof(CONFIG_SYS_PROMPT) + 16)
52 /* Boot Argument Buffer Size */
53 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
55 #define CONFIG_SYS_MBAR 0xFC000000
58 * Definitions for initial stack pointer and data area (in internal SRAM)
60 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
61 /* End of used area in internal SRAM */
62 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000
63 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
64 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \
65 GENERATED_GBL_DATA_SIZE) - 32)
66 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
67 #define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
70 * Start addresses for the final memory configuration
71 * (Set up by the startup code)
72 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
74 #define CONFIG_SYS_SDRAM_BASE 0x40000000
75 #define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */
77 #define CONFIG_SYS_DRAM_TEST
79 #if defined(CONFIG_CF_SBF)
80 #define CONFIG_SERIAL_BOOT
83 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
84 /* Reserve 256 kB for Monitor */
85 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
88 * For booting Linux, the board info and command line data
89 * have to be in the first 8 MB of memory, since this is
90 * the maximum mapped by the Linux kernel during initialization ??
92 /* Initial Memory map for Linux */
93 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
94 (CONFIG_SYS_SDRAM_SIZE << 20))
96 /* Configuration for environment
97 * Environment is embedded in u-boot in the second sector of the flash
100 /* Cache Configuration */
101 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
102 CONFIG_SYS_INIT_RAM_SIZE - 8)
103 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
104 CONFIG_SYS_INIT_RAM_SIZE - 4)
105 #define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA)
106 #define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA)
107 #define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \
108 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
109 CF_ACR_EN | CF_ACR_SM_ALL)
110 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \
111 CF_CACR_ICINVA | CF_CACR_EUSP)
112 #define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR | \
113 CF_CACR_DEC | CF_CACR_DDCM_P | \
114 CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
116 #define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
117 CONFIG_SYS_INIT_RAM_SIZE - 12)
120 #define CONFIG_SYS_DISCOVER_PHY
121 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
122 #ifndef CONFIG_SYS_DISCOVER_PHY
123 #define FECDUPLEX FULL
124 #define FECSPEED _100BASET
125 #endif /* CONFIG_SYS_DISCOVER_PHY */
127 #endif /* __STMARK2_CONFIG_H */