2 * Sysam stmark2 board configuration
4 * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __STMARK2_CONFIG_H
10 #define __STMARK2_CONFIG_H
12 #define CONFIG_HOSTNAME stmark2
14 #define CONFIG_MCFUART
15 #define CONFIG_SYS_UART_PORT 0
16 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
18 #define LDS_BOARD_TEXT \
19 board/sysam/stmark2/sbf_dram_init.o (.text*)
21 #define CONFIG_TIMESTAMP
23 #define CONFIG_BOOTARGS \
24 "console=ttyS0,115200 root=/dev/ram0 rw " \
29 #define CONFIG_BOOTCOMMAND \
30 "sf probe 0:1 50000000; " \
31 "sf read ${loadaddr} 0x100000 ${kern_size}; " \
34 #define CONFIG_EXTRA_ENV_SETTINGS \
35 "kern_size=0x700000\0" \
36 "loadaddr=0x40001000\0" \
38 "update_uboot=loady ${loadaddr}; " \
39 "sf probe 0:1 50000000; " \
40 "sf erase 0 0x80000; " \
41 "sf write ${loadaddr} 0 ${filesize}\0" \
42 "update_kernel=loady ${loadaddr}; " \
43 "setenv kern_size ${filesize}; saveenv; " \
44 "sf probe 0:1 50000000; " \
45 "sf erase 0x100000 0x700000; " \
46 "sf write ${loadaddr} 0x100000 ${filesize}\0" \
47 "update_rootfs=loady ${loadaddr}; " \
48 "sf probe 0:1 50000000; " \
49 "sf erase 0x00800000 0x100000; " \
50 "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
55 #define CONFIG_RTC_MCFRRTC
56 #define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000
58 /* spi not partitions */
59 #define CONFIG_MTD_DEVICE
60 #define CONFIG_JFFS2_CMDLINE
61 #define CONFIG_JFFS2_DEV "nor0"
67 /* DSPI and Serial Flash */
69 #define CONFIG_CF_DSPI
70 #define CONFIG_SF_DEFAULT_SPEED 50000000
71 #define CONFIG_SERIAL_FLASH
72 #define CONFIG_HARD_SPI
73 #define CONFIG_SPI_FLASH_ISSI
74 #define CONFIG_ENV_SPI_BUS 0
75 #define CONFIG_ENV_SPI_CS 1
77 #define CONFIG_SYS_SBFHDR_SIZE 0x7
79 #define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \
80 DSPI_CTAR_PCSSCK_1CLK | \
83 DSPI_CTAR_CSSCK(0) | \
87 #define CONFIG_SYS_DSPI_CTAR1 (CONFIG_SYS_DSPI_CTAR0)
88 #define CONFIG_SYS_DSPI_CTAR2 (CONFIG_SYS_DSPI_CTAR0)
90 /* Input, PCI, Flexbus, and VCO */
91 #define CONFIG_EXTRA_CLOCK
93 #define CONFIG_PRAM 2048 /* 2048 KB */
94 #define CONFIG_SYS_LONGHELP
95 #define CONFIG_AUTO_COMPLETE
96 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
98 /* Print Buffer Size */
99 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
100 sizeof(CONFIG_SYS_PROMPT) + 16)
101 #define CONFIG_SYS_MAXARGS 16
102 /* Boot Argument Buffer Size */
103 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
105 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
106 #define CONFIG_SYS_MBAR 0xFC000000
109 * Definitions for initial stack pointer and data area (in internal SRAM)
111 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
112 /* End of used area in internal SRAM */
113 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000
114 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
115 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \
116 GENERATED_GBL_DATA_SIZE) - 32)
117 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
118 #define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
121 * Start addresses for the final memory configuration
122 * (Set up by the startup code)
123 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
125 #define CONFIG_SYS_SDRAM_BASE 0x40000000
126 #define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */
128 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x400)
129 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
130 #define CONFIG_SYS_DRAM_TEST
132 #if defined(CONFIG_CF_SBF)
133 #define CONFIG_SERIAL_BOOT
136 #if defined(CONFIG_SERIAL_BOOT)
137 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
139 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
142 #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
143 /* Reserve 256 kB for Monitor */
144 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
145 /* Reserve 256 kB for malloc() */
146 #define CONFIG_SYS_MALLOC_LEN (256 << 10)
149 * For booting Linux, the board info and command line data
150 * have to be in the first 8 MB of memory, since this is
151 * the maximum mapped by the Linux kernel during initialization ??
153 /* Initial Memory map for Linux */
154 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
155 (CONFIG_SYS_SDRAM_SIZE << 20))
157 /* Configuration for environment
158 * Environment is embedded in u-boot in the second sector of the flash
161 #if defined(CONFIG_CF_SBF)
162 #define CONFIG_ENV_IS_IN_SPI_FLASH 1
163 #define CONFIG_ENV_SPI_CS 1
164 #define CONFIG_ENV_OFFSET 0x40000
165 #define CONFIG_ENV_SIZE 0x2000
166 #define CONFIG_ENV_SECT_SIZE 0x10000
169 #undef CONFIG_ENV_OVERWRITE
171 /* Cache Configuration */
172 #define CONFIG_SYS_CACHELINE_SIZE 16
173 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
174 CONFIG_SYS_INIT_RAM_SIZE - 8)
175 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
176 CONFIG_SYS_INIT_RAM_SIZE - 4)
177 #define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA)
178 #define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA)
179 #define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \
180 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
181 CF_ACR_EN | CF_ACR_SM_ALL)
182 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \
183 CF_CACR_ICINVA | CF_CACR_EUSP)
184 #define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR | \
185 CF_CACR_DEC | CF_CACR_DDCM_P | \
186 CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
188 #define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
189 CONFIG_SYS_INIT_RAM_SIZE - 12)
191 #endif /* __STMARK2_CONFIG_H */