m68k: add board stmark2, mcf5441x based
[platform/kernel/u-boot.git] / include / configs / stmark2.h
1 /*
2  * Sysam stmark2 board configuration
3  *
4  * (C) Copyright 2017  Angelo Dureghello <angelo@sysam.it>
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8
9 #ifndef __STMARK2_CONFIG_H
10 #define __STMARK2_CONFIG_H
11
12 #define CONFIG_STMARK2
13 #define CONFIG_HOSTNAME                 stmark2
14
15 #define CONFIG_MCFUART
16 #define CONFIG_SYS_UART_PORT            0
17 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600 , 19200 , 38400 , 57600, 115200 }
18
19 #define LDS_BOARD_TEXT                                          \
20         board/sysam/stmark2/sbf_dram_init.o (.text*)
21
22 #define CONFIG_TIMESTAMP
23
24 #define CONFIG_BOOTARGS                                         \
25         "console=ttyS0,115200 root=/dev/ram0 rw "               \
26                 "rootfstype=ramfs "                             \
27                 "rdinit=/bin/init "                             \
28                 "devtmpfs.mount=1"
29
30 #define CONFIG_BOOTCOMMAND                                      \
31         "sf probe 0:1 50000000; "                               \
32         "sf read ${loadaddr} 0x100000 ${kern_size}; "           \
33         "bootm ${loadaddr}"
34
35 #define CONFIG_EXTRA_ENV_SETTINGS                               \
36         "kern_size=0x700000\0"                                  \
37         "loadaddr=0x40001000\0"                                 \
38                 "-(rootfs)\0"                                   \
39         "update_uboot=loady ${loadaddr}; "                      \
40                 "sf probe 0:1 50000000; "                       \
41                 "sf erase 0 0x80000; "                          \
42                 "sf write ${loadaddr} 0 ${filesize}\0"          \
43         "update_kernel=loady ${loadaddr}; "                     \
44                 "setenv kern_size ${filesize}; saveenv; "       \
45                 "sf probe 0:1 50000000; "                       \
46                 "sf erase 0x100000 0x700000; "                  \
47                 "sf write ${loadaddr} 0x100000 ${filesize}\0"   \
48         "update_rootfs=loady ${loadaddr}; "                     \
49                 "sf probe 0:1 50000000; "                       \
50                 "sf erase 0x00800000 0x100000; "                \
51                 "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
52         ""
53
54 /* Realtime clock */
55 #undef CONFIG_MCFRTC
56 #define CONFIG_RTC_MCFRRTC
57 #define CONFIG_SYS_MCFRRTC_BASE         0xFC0A8000
58
59 /* spi not partitions */
60 #define CONFIG_CMD_MTDPARTS
61 #define CONFIG_MTD_DEVICE
62 #define CONFIG_JFFS2_CMDLINE
63 #define CONFIG_JFFS2_DEV                "nor0"
64 #define MTDIDS_DEFAULT                  "nor0=spi-flash.0"
65 #define MTDPARTS_DEFAULT                                        \
66         "mtdparts=spi-flash.0:"                                 \
67                 "1m(u-boot),"                                   \
68                 "7m(kernel),"                                   \
69                 "-(rootfs)"
70
71 /* Timer */
72 #define CONFIG_MCFTMR
73 #undef CONFIG_MCFPIT
74
75 /* DSPI and Serial Flash */
76 #define CONFIG_CF_SPI
77 #define CONFIG_CF_DSPI
78 #define CONFIG_SF_DEFAULT_SPEED         50000000
79 #define CONFIG_SERIAL_FLASH
80 #define CONFIG_HARD_SPI
81 #define CONFIG_SPI_FLASH_ISSI
82 #define CONFIG_ENV_SPI_BUS              0
83 #define CONFIG_ENV_SPI_CS               1
84
85 #define CONFIG_SYS_SBFHDR_SIZE          0x7
86
87 #define CONFIG_SYS_DSPI_CTAR0           (DSPI_CTAR_TRSZ(7) | \
88                                         DSPI_CTAR_PCSSCK_1CLK | \
89                                         DSPI_CTAR_PASC(0) | \
90                                         DSPI_CTAR_PDT(0) | \
91                                         DSPI_CTAR_CSSCK(0) | \
92                                         DSPI_CTAR_ASC(0) | \
93                                         DSPI_CTAR_DT(1) | \
94                                         DSPI_CTAR_BR(6))
95 #define CONFIG_SYS_DSPI_CTAR1           (CONFIG_SYS_DSPI_CTAR0)
96 #define CONFIG_SYS_DSPI_CTAR2           (CONFIG_SYS_DSPI_CTAR0)
97
98 /* Input, PCI, Flexbus, and VCO */
99 #define CONFIG_EXTRA_CLOCK
100
101 #define CONFIG_PRAM                     2048    /* 2048 KB */
102 #define CONFIG_SYS_LONGHELP
103 #define CONFIG_AUTO_COMPLETE
104 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
105
106 /* Print Buffer Size */
107 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
108                                         sizeof(CONFIG_SYS_PROMPT) + 16)
109 #define CONFIG_SYS_MAXARGS              16
110 /* Boot Argument Buffer Size    */
111 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
112
113 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x10000)
114 #define CONFIG_SYS_MBAR                 0xFC000000
115
116 /*
117  * Definitions for initial stack pointer and data area (in internal SRAM)
118  */
119 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
120 /* End of used area in internal SRAM */
121 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000
122 #define CONFIG_SYS_INIT_RAM_CTRL        0x221
123 #define CONFIG_SYS_GBL_DATA_OFFSET      ((CONFIG_SYS_INIT_RAM_SIZE - \
124                                         GENERATED_GBL_DATA_SIZE) - 32)
125 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
126 #define CONFIG_SYS_SBFHDR_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_SIZE - 32)
127
128 /*
129  * Start addresses for the final memory configuration
130  * (Set up by the startup code)
131  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
132  */
133 #define CONFIG_SYS_SDRAM_BASE           0x40000000
134 #define CONFIG_SYS_SDRAM_SIZE           128     /* SDRAM size in MB */
135
136 #define CONFIG_SYS_MEMTEST_START        (CONFIG_SYS_SDRAM_BASE + 0x400)
137 #define CONFIG_SYS_MEMTEST_END          ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
138 #define CONFIG_SYS_DRAM_TEST
139
140 #if defined(CONFIG_CF_SBF)
141 #define CONFIG_SERIAL_BOOT
142 #endif
143
144 #if defined(CONFIG_SERIAL_BOOT)
145 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_TEXT_BASE + 0x400)
146 #else
147 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_FLASH_BASE + 0x400)
148 #endif
149
150 #define CONFIG_SYS_BOOTPARAMS_LEN       (64 * 1024)
151 /* Reserve 256 kB for Monitor */
152 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
153 /* Reserve 256 kB for malloc() */
154 #define CONFIG_SYS_MALLOC_LEN           (256 << 10)
155
156 /*
157  * For booting Linux, the board info and command line data
158  * have to be in the first 8 MB of memory, since this is
159  * the maximum mapped by the Linux kernel during initialization ??
160  */
161 /* Initial Memory map for Linux */
162 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + \
163                                         (CONFIG_SYS_SDRAM_SIZE << 20))
164
165 /* Configuration for environment
166  * Environment is embedded in u-boot in the second sector of the flash
167  */
168
169 #if defined(CONFIG_CF_SBF)
170 #define CONFIG_ENV_IS_IN_SPI_FLASH      1
171 #define CONFIG_ENV_SPI_CS               1
172 #define CONFIG_ENV_OFFSET               0x40000
173 #define CONFIG_ENV_SIZE                 0x2000
174 #define CONFIG_ENV_SECT_SIZE            0x10000
175 #endif
176
177 #undef CONFIG_ENV_OVERWRITE
178
179 /* Cache Configuration */
180 #define CONFIG_SYS_CACHELINE_SIZE       16
181 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
182                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
183 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
184                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
185 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_BCINVA + CF_CACR_ICINVA)
186 #define CONFIG_SYS_DCACHE_INV           (CF_CACR_DCINVA)
187 #define CONFIG_SYS_CACHE_ACR2           (CONFIG_SYS_SDRAM_BASE | \
188                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
189                                          CF_ACR_EN | CF_ACR_SM_ALL)
190 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_BEC | CF_CACR_IEC | \
191                                          CF_CACR_ICINVA | CF_CACR_EUSP)
192 #define CONFIG_SYS_CACHE_DCACR          ((CONFIG_SYS_CACHE_ICACR | \
193                                          CF_CACR_DEC | CF_CACR_DDCM_P | \
194                                          CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
195
196 #define CACR_STATUS                     (CONFIG_SYS_INIT_RAM_ADDR + \
197                                         CONFIG_SYS_INIT_RAM_SIZE - 12)
198
199 #endif /* __STMARK2_CONFIG_H */