1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Sysam stmark2 board configuration
5 * (C) Copyright 2017 Angelo Dureghello <angelo@sysam.it>
8 #ifndef __STMARK2_CONFIG_H
9 #define __STMARK2_CONFIG_H
11 #define CFG_SYS_UART_PORT 0
13 #define LDS_BOARD_TEXT \
14 board/sysam/stmark2/sbf_dram_init.o (.text*)
16 #define CFG_EXTRA_ENV_SETTINGS \
17 "kern_size=0x700000\0" \
18 "loadaddr=0x40001000\0" \
20 "update_uboot=loady ${loadaddr}; " \
21 "sf probe 0:1 50000000; " \
22 "sf erase 0 0x80000; " \
23 "sf write ${loadaddr} 0 ${filesize}\0" \
24 "update_kernel=loady ${loadaddr}; " \
25 "setenv kern_size ${filesize}; saveenv; " \
26 "sf probe 0:1 50000000; " \
27 "sf erase 0x100000 0x700000; " \
28 "sf write ${loadaddr} 0x100000 ${filesize}\0" \
29 "update_rootfs=loady ${loadaddr}; " \
30 "sf probe 0:1 50000000; " \
31 "sf erase 0x00800000 0x100000; " \
32 "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
35 #define CFG_SYS_SBFHDR_SIZE 0x7
37 /* Input, PCI, Flexbus, and VCO */
39 #define CFG_PRAM 2048 /* 2048 KB */
41 #define CFG_SYS_MBAR 0xFC000000
44 * Definitions for initial stack pointer and data area (in internal SRAM)
46 #define CFG_SYS_INIT_RAM_ADDR 0x80000000
47 /* End of used area in internal SRAM */
48 #define CFG_SYS_INIT_RAM_SIZE 0x10000
49 #define CFG_SYS_INIT_RAM_CTRL 0x221
50 #define CFG_SYS_INIT_SP_OFFSET ((CFG_SYS_INIT_RAM_SIZE - \
51 GENERATED_GBL_DATA_SIZE) - 32)
52 #define CFG_SYS_SBFHDR_DATA_OFFSET (CFG_SYS_INIT_RAM_SIZE - 32)
55 * Start addresses for the final memory configuration
56 * (Set up by the startup code)
57 * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0
59 #define CFG_SYS_SDRAM_BASE 0x40000000
60 #define CFG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */
62 #define CFG_SYS_DRAM_TEST
64 /* Reserve 256 kB for Monitor */
67 * For booting Linux, the board info and command line data
68 * have to be in the first 8 MB of memory, since this is
69 * the maximum mapped by the Linux kernel during initialization ??
71 /* Initial Memory map for Linux */
72 #define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + \
73 (CFG_SYS_SDRAM_SIZE << 20))
75 /* Configuration for environment
76 * Environment is embedded in u-boot in the second sector of the flash
79 /* Cache Configuration */
80 #define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
81 CFG_SYS_INIT_RAM_SIZE - 8)
82 #define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
83 CFG_SYS_INIT_RAM_SIZE - 4)
84 #define CFG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA)
85 #define CFG_SYS_DCACHE_INV (CF_CACR_DCINVA)
86 #define CFG_SYS_CACHE_ACR2 (CFG_SYS_SDRAM_BASE | \
87 CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \
88 CF_ACR_EN | CF_ACR_SM_ALL)
89 #define CFG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \
90 CF_CACR_ICINVA | CF_CACR_EUSP)
91 #define CFG_SYS_CACHE_DCACR ((CFG_SYS_CACHE_ICACR | \
92 CF_CACR_DEC | CF_CACR_DDCM_P | \
93 CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
95 #define CACR_STATUS (CFG_SYS_INIT_RAM_ADDR + \
96 CFG_SYS_INIT_RAM_SIZE - 12)
100 #define CFG_SYS_I2C_0
102 #endif /* __STMARK2_CONFIG_H */