Merge branch 'master' of git://git.denx.de/u-boot-socfpga
[platform/kernel/u-boot.git] / include / configs / stmark2.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Sysam stmark2 board configuration
4  *
5  * (C) Copyright 2017  Angelo Dureghello <angelo@sysam.it>
6  */
7
8 #ifndef __STMARK2_CONFIG_H
9 #define __STMARK2_CONFIG_H
10
11 #define CONFIG_HOSTNAME                 "stmark2"
12
13 #define CONFIG_MCFUART
14 #define CONFIG_SYS_UART_PORT            0
15 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600 , 19200 , 38400 , 57600, 115200 }
16
17 #define LDS_BOARD_TEXT                                          \
18         board/sysam/stmark2/sbf_dram_init.o (.text*)
19
20 #define CONFIG_TIMESTAMP
21
22 #define CONFIG_BOOTARGS                                         \
23         "console=ttyS0,115200 root=/dev/ram0 rw "               \
24                 "rootfstype=ramfs "                             \
25                 "rdinit=/bin/init "                             \
26                 "devtmpfs.mount=1"
27
28 #define CONFIG_BOOTCOMMAND                                      \
29         "sf probe 0:1 50000000; "                               \
30         "sf read ${loadaddr} 0x100000 ${kern_size}; "           \
31         "bootm ${loadaddr}"
32
33 #define CONFIG_EXTRA_ENV_SETTINGS                               \
34         "kern_size=0x700000\0"                                  \
35         "loadaddr=0x40001000\0"                                 \
36                 "-(rootfs)\0"                                   \
37         "update_uboot=loady ${loadaddr}; "                      \
38                 "sf probe 0:1 50000000; "                       \
39                 "sf erase 0 0x80000; "                          \
40                 "sf write ${loadaddr} 0 ${filesize}\0"          \
41         "update_kernel=loady ${loadaddr}; "                     \
42                 "setenv kern_size ${filesize}; saveenv; "       \
43                 "sf probe 0:1 50000000; "                       \
44                 "sf erase 0x100000 0x700000; "                  \
45                 "sf write ${loadaddr} 0x100000 ${filesize}\0"   \
46         "update_rootfs=loady ${loadaddr}; "                     \
47                 "sf probe 0:1 50000000; "                       \
48                 "sf erase 0x00800000 0x100000; "                \
49                 "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
50         ""
51
52 /* Realtime clock */
53 #undef CONFIG_MCFRTC
54 #define CONFIG_RTC_MCFRRTC
55 #define CONFIG_SYS_MCFRRTC_BASE         0xFC0A8000
56
57 /* spi not partitions */
58 #define CONFIG_JFFS2_CMDLINE
59 #define CONFIG_JFFS2_DEV                "nor0"
60
61 /* Timer */
62 #define CONFIG_MCFTMR
63 #undef CONFIG_MCFPIT
64
65 /* DSPI and Serial Flash */
66 #define CONFIG_CF_DSPI
67 #define CONFIG_SERIAL_FLASH
68
69 #define CONFIG_SYS_SBFHDR_SIZE          0x7
70
71 #define CONFIG_SYS_DSPI_CTAR0           (DSPI_CTAR_TRSZ(7) | \
72                                         DSPI_CTAR_PCSSCK_1CLK | \
73                                         DSPI_CTAR_PASC(0) | \
74                                         DSPI_CTAR_PDT(0) | \
75                                         DSPI_CTAR_CSSCK(0) | \
76                                         DSPI_CTAR_ASC(0) | \
77                                         DSPI_CTAR_DT(1) | \
78                                         DSPI_CTAR_BR(6))
79 #define CONFIG_SYS_DSPI_CTAR1           (CONFIG_SYS_DSPI_CTAR0)
80 #define CONFIG_SYS_DSPI_CTAR2           (CONFIG_SYS_DSPI_CTAR0)
81
82 /* Input, PCI, Flexbus, and VCO */
83 #define CONFIG_EXTRA_CLOCK
84
85 #define CONFIG_PRAM                     2048    /* 2048 KB */
86 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
87
88 /* Print Buffer Size */
89 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
90                                         sizeof(CONFIG_SYS_PROMPT) + 16)
91 #define CONFIG_SYS_MAXARGS              16
92 /* Boot Argument Buffer Size    */
93 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
94
95 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x10000)
96 #define CONFIG_SYS_MBAR                 0xFC000000
97
98 /*
99  * Definitions for initial stack pointer and data area (in internal SRAM)
100  */
101 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
102 /* End of used area in internal SRAM */
103 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000
104 #define CONFIG_SYS_INIT_RAM_CTRL        0x221
105 #define CONFIG_SYS_GBL_DATA_OFFSET      ((CONFIG_SYS_INIT_RAM_SIZE - \
106                                         GENERATED_GBL_DATA_SIZE) - 32)
107 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
108 #define CONFIG_SYS_SBFHDR_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_SIZE - 32)
109
110 /*
111  * Start addresses for the final memory configuration
112  * (Set up by the startup code)
113  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
114  */
115 #define CONFIG_SYS_SDRAM_BASE           0x40000000
116 #define CONFIG_SYS_SDRAM_SIZE           128     /* SDRAM size in MB */
117
118 #define CONFIG_SYS_MEMTEST_START        (CONFIG_SYS_SDRAM_BASE + 0x400)
119 #define CONFIG_SYS_MEMTEST_END          ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
120 #define CONFIG_SYS_DRAM_TEST
121
122 #if defined(CONFIG_CF_SBF)
123 #define CONFIG_SERIAL_BOOT
124 #endif
125
126 #if defined(CONFIG_SERIAL_BOOT)
127 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_TEXT_BASE + 0x400)
128 #else
129 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_FLASH_BASE + 0x400)
130 #endif
131
132 #define CONFIG_SYS_BOOTPARAMS_LEN       (64 * 1024)
133 /* Reserve 256 kB for Monitor */
134 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
135 /* Reserve 256 kB for malloc() */
136 #define CONFIG_SYS_MALLOC_LEN           (256 << 10)
137
138 /*
139  * For booting Linux, the board info and command line data
140  * have to be in the first 8 MB of memory, since this is
141  * the maximum mapped by the Linux kernel during initialization ??
142  */
143 /* Initial Memory map for Linux */
144 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + \
145                                         (CONFIG_SYS_SDRAM_SIZE << 20))
146
147 /* Configuration for environment
148  * Environment is embedded in u-boot in the second sector of the flash
149  */
150
151 #if defined(CONFIG_CF_SBF)
152 #define CONFIG_ENV_IS_IN_SPI_FLASH      1
153 #define CONFIG_ENV_OFFSET               0x40000
154 #define CONFIG_ENV_SIZE                 0x2000
155 #define CONFIG_ENV_SECT_SIZE            0x10000
156 #endif
157
158 #undef CONFIG_ENV_OVERWRITE
159
160 /* Cache Configuration */
161 #define CONFIG_SYS_CACHELINE_SIZE       16
162 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
163                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
164 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
165                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
166 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_BCINVA + CF_CACR_ICINVA)
167 #define CONFIG_SYS_DCACHE_INV           (CF_CACR_DCINVA)
168 #define CONFIG_SYS_CACHE_ACR2           (CONFIG_SYS_SDRAM_BASE | \
169                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
170                                          CF_ACR_EN | CF_ACR_SM_ALL)
171 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_BEC | CF_CACR_IEC | \
172                                          CF_CACR_ICINVA | CF_CACR_EUSP)
173 #define CONFIG_SYS_CACHE_DCACR          ((CONFIG_SYS_CACHE_ICACR | \
174                                          CF_CACR_DEC | CF_CACR_DDCM_P | \
175                                          CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
176
177 #define CACR_STATUS                     (CONFIG_SYS_INIT_RAM_ADDR + \
178                                         CONFIG_SYS_INIT_RAM_SIZE - 12)
179
180 #endif /* __STMARK2_CONFIG_H */