include/configs/stmark2.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Sysam stmark2 board configuration
   4  *
   5  * (C) Copyright 2017  Angelo Dureghello <angelo@sysam.it>
   6  */
   7
   8 #ifndef __STMARK2_CONFIG_H
   9 #define __STMARK2_CONFIG_H
  10
  11 #define CONFIG_HOSTNAME                 "stmark2"
  12
  13 #define CONFIG_SYS_UART_PORT            0
  14
  15 #define LDS_BOARD_TEXT                                          \
  16         board/sysam/stmark2/sbf_dram_init.o (.text*)
  17
  18 #define CONFIG_TIMESTAMP
  19
  20 #define CONFIG_BOOTCOMMAND                                      \
  21         "sf probe 0:1 50000000; "                               \
  22         "sf read ${loadaddr} 0x100000 ${kern_size}; "           \
  23         "bootm ${loadaddr}"
  24
  25 #define CONFIG_EXTRA_ENV_SETTINGS                               \
  26         "kern_size=0x700000\0"                                  \
  27         "loadaddr=0x40001000\0"                                 \
  28                 "-(rootfs)\0"                                   \
  29         "update_uboot=loady ${loadaddr}; "                      \
  30                 "sf probe 0:1 50000000; "                       \
  31                 "sf erase 0 0x80000; "                          \
  32                 "sf write ${loadaddr} 0 ${filesize}\0"          \
  33         "update_kernel=loady ${loadaddr}; "                     \
  34                 "setenv kern_size ${filesize}; saveenv; "       \
  35                 "sf probe 0:1 50000000; "                       \
  36                 "sf erase 0x100000 0x700000; "                  \
  37                 "sf write ${loadaddr} 0x100000 ${filesize}\0"   \
  38         "update_rootfs=loady ${loadaddr}; "                     \
  39                 "sf probe 0:1 50000000; "                       \
  40                 "sf erase 0x00800000 0x100000; "                \
  41                 "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
  42         ""
  43
  44 /* Realtime clock */
  45 #undef CONFIG_MCFRTC
  46 #define CONFIG_RTC_MCFRRTC
  47 #define CONFIG_SYS_MCFRRTC_BASE         0xFC0A8000
  48
  49 /* spi not partitions */
  50 #define CONFIG_JFFS2_DEV                "nor0"
  51
  52 /* Timer */
  53 #define CONFIG_MCFTMR
  54
  55 /* DSPI and Serial Flash */
  56 #define CONFIG_CF_DSPI
  57 #define CONFIG_SERIAL_FLASH
  58
  59 #define CONFIG_SYS_SBFHDR_SIZE          0x7
  60
  61 /* Input, PCI, Flexbus, and VCO */
  62 #define CONFIG_EXTRA_CLOCK
  63
  64 #define CONFIG_PRAM                     2048    /* 2048 KB */
  65 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
  66
  67 /* Print Buffer Size */
  68 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
  69                                         sizeof(CONFIG_SYS_PROMPT) + 16)
  70 #define CONFIG_SYS_MAXARGS              16
  71 /* Boot Argument Buffer Size    */
  72 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  73
  74 #define CONFIG_SYS_MBAR                 0xFC000000
  75
  76 /*
  77  * Definitions for initial stack pointer and data area (in internal SRAM)
  78  */
  79 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
  80 /* End of used area in internal SRAM */
  81 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000
  82 #define CONFIG_SYS_INIT_RAM_CTRL        0x221
  83 #define CONFIG_SYS_GBL_DATA_OFFSET      ((CONFIG_SYS_INIT_RAM_SIZE - \
  84                                         GENERATED_GBL_DATA_SIZE) - 32)
  85 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
  86 #define CONFIG_SYS_SBFHDR_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_SIZE - 32)
  87
  88 /*
  89  * Start addresses for the final memory configuration
  90  * (Set up by the startup code)
  91  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  92  */
  93 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  94 #define CONFIG_SYS_SDRAM_SIZE           128     /* SDRAM size in MB */
  95
  96 #define CONFIG_SYS_DRAM_TEST
  97
  98 #if defined(CONFIG_CF_SBF)
  99 #define CONFIG_SERIAL_BOOT
 100 #endif
 101
 102 #if defined(CONFIG_SERIAL_BOOT)
 103 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_TEXT_BASE + 0x400)
 104 #else
 105 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_FLASH_BASE + 0x400)
 106 #endif
 107
 108 #define CONFIG_SYS_BOOTPARAMS_LEN       (64 * 1024)
 109 /* Reserve 256 kB for Monitor */
 110 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
 111
 112 /*
 113  * For booting Linux, the board info and command line data
 114  * have to be in the first 8 MB of memory, since this is
 115  * the maximum mapped by the Linux kernel during initialization ??
 116  */
 117 /* Initial Memory map for Linux */
 118 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + \
 119                                         (CONFIG_SYS_SDRAM_SIZE << 20))
 120
 121 /* Configuration for environment
 122  * Environment is embedded in u-boot in the second sector of the flash
 123  */
 124
 125 #if defined(CONFIG_CF_SBF)
 126 #define CONFIG_ENV_IS_IN_SPI_FLASH      1
 127 #endif
 128
 129 /* Cache Configuration */
 130 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 131                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 132 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 133                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 134 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_BCINVA + CF_CACR_ICINVA)
 135 #define CONFIG_SYS_DCACHE_INV           (CF_CACR_DCINVA)
 136 #define CONFIG_SYS_CACHE_ACR2           (CONFIG_SYS_SDRAM_BASE | \
 137                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 138                                          CF_ACR_EN | CF_ACR_SM_ALL)
 139 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_BEC | CF_CACR_IEC | \
 140                                          CF_CACR_ICINVA | CF_CACR_EUSP)
 141 #define CONFIG_SYS_CACHE_DCACR          ((CONFIG_SYS_CACHE_ICACR | \
 142                                          CF_CACR_DEC | CF_CACR_DDCM_P | \
 143                                          CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
 144
 145 #define CACR_STATUS                     (CONFIG_SYS_INIT_RAM_ADDR + \
 146                                         CONFIG_SYS_INIT_RAM_SIZE - 12)
 147
 148 #ifdef CONFIG_MCFFEC
 149 #define CONFIG_MII_INIT                 1
 150 #define CONFIG_SYS_DISCOVER_PHY
 151 #define CONFIG_SYS_RX_ETH_BUFFER        8
 152 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 153 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
 154 #ifndef CONFIG_SYS_DISCOVER_PHY
 155 #define FECDUPLEX                       FULL
 156 #define FECSPEED                        _100BASET
 157 #else
 158 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 159 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 160 #endif
 161 #endif /* CONFIG_SYS_DISCOVER_PHY */
 162 #endif
 163 #endif /* __STMARK2_CONFIG_H */