include/configs/stmark2.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Sysam stmark2 board configuration
   4  *
   5  * (C) Copyright 2017  Angelo Dureghello <angelo@sysam.it>
   6  */
   7
   8 #ifndef __STMARK2_CONFIG_H
   9 #define __STMARK2_CONFIG_H
  10
  11 #define CONFIG_HOSTNAME                 "stmark2"
  12
  13 #define CONFIG_MCFUART
  14 #define CONFIG_SYS_UART_PORT            0
  15
  16 #define LDS_BOARD_TEXT                                          \
  17         board/sysam/stmark2/sbf_dram_init.o (.text*)
  18
  19 #define CONFIG_TIMESTAMP
  20
  21 #define CONFIG_BOOTCOMMAND                                      \
  22         "sf probe 0:1 50000000; "                               \
  23         "sf read ${loadaddr} 0x100000 ${kern_size}; "           \
  24         "bootm ${loadaddr}"
  25
  26 #define CONFIG_EXTRA_ENV_SETTINGS                               \
  27         "kern_size=0x700000\0"                                  \
  28         "loadaddr=0x40001000\0"                                 \
  29                 "-(rootfs)\0"                                   \
  30         "update_uboot=loady ${loadaddr}; "                      \
  31                 "sf probe 0:1 50000000; "                       \
  32                 "sf erase 0 0x80000; "                          \
  33                 "sf write ${loadaddr} 0 ${filesize}\0"          \
  34         "update_kernel=loady ${loadaddr}; "                     \
  35                 "setenv kern_size ${filesize}; saveenv; "       \
  36                 "sf probe 0:1 50000000; "                       \
  37                 "sf erase 0x100000 0x700000; "                  \
  38                 "sf write ${loadaddr} 0x100000 ${filesize}\0"   \
  39         "update_rootfs=loady ${loadaddr}; "                     \
  40                 "sf probe 0:1 50000000; "                       \
  41                 "sf erase 0x00800000 0x100000; "                \
  42                 "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
  43         ""
  44
  45 /* Realtime clock */
  46 #undef CONFIG_MCFRTC
  47 #define CONFIG_RTC_MCFRRTC
  48 #define CONFIG_SYS_MCFRRTC_BASE         0xFC0A8000
  49
  50 /* spi not partitions */
  51 #define CONFIG_JFFS2_DEV                "nor0"
  52
  53 /* Timer */
  54 #define CONFIG_MCFTMR
  55
  56 /* DSPI and Serial Flash */
  57 #define CONFIG_CF_DSPI
  58 #define CONFIG_SERIAL_FLASH
  59
  60 #define CONFIG_SYS_SBFHDR_SIZE          0x7
  61
  62 /* Input, PCI, Flexbus, and VCO */
  63 #define CONFIG_EXTRA_CLOCK
  64
  65 #define CONFIG_PRAM                     2048    /* 2048 KB */
  66 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
  67
  68 /* Print Buffer Size */
  69 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
  70                                         sizeof(CONFIG_SYS_PROMPT) + 16)
  71 #define CONFIG_SYS_MAXARGS              16
  72 /* Boot Argument Buffer Size    */
  73 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  74
  75 #define CONFIG_SYS_MBAR                 0xFC000000
  76
  77 /*
  78  * Definitions for initial stack pointer and data area (in internal SRAM)
  79  */
  80 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
  81 /* End of used area in internal SRAM */
  82 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000
  83 #define CONFIG_SYS_INIT_RAM_CTRL        0x221
  84 #define CONFIG_SYS_GBL_DATA_OFFSET      ((CONFIG_SYS_INIT_RAM_SIZE - \
  85                                         GENERATED_GBL_DATA_SIZE) - 32)
  86 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
  87 #define CONFIG_SYS_SBFHDR_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_SIZE - 32)
  88
  89 /*
  90  * Start addresses for the final memory configuration
  91  * (Set up by the startup code)
  92  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  93  */
  94 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  95 #define CONFIG_SYS_SDRAM_SIZE           128     /* SDRAM size in MB */
  96
  97 #define CONFIG_SYS_DRAM_TEST
  98
  99 #if defined(CONFIG_CF_SBF)
 100 #define CONFIG_SERIAL_BOOT
 101 #endif
 102
 103 #if defined(CONFIG_SERIAL_BOOT)
 104 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_TEXT_BASE + 0x400)
 105 #else
 106 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_FLASH_BASE + 0x400)
 107 #endif
 108
 109 #define CONFIG_SYS_BOOTPARAMS_LEN       (64 * 1024)
 110 /* Reserve 256 kB for Monitor */
 111 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
 112
 113 /*
 114  * For booting Linux, the board info and command line data
 115  * have to be in the first 8 MB of memory, since this is
 116  * the maximum mapped by the Linux kernel during initialization ??
 117  */
 118 /* Initial Memory map for Linux */
 119 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + \
 120                                         (CONFIG_SYS_SDRAM_SIZE << 20))
 121
 122 /* Configuration for environment
 123  * Environment is embedded in u-boot in the second sector of the flash
 124  */
 125
 126 #if defined(CONFIG_CF_SBF)
 127 #define CONFIG_ENV_IS_IN_SPI_FLASH      1
 128 #endif
 129
 130 /* Cache Configuration */
 131 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 132                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 133 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 134                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 135 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_BCINVA + CF_CACR_ICINVA)
 136 #define CONFIG_SYS_DCACHE_INV           (CF_CACR_DCINVA)
 137 #define CONFIG_SYS_CACHE_ACR2           (CONFIG_SYS_SDRAM_BASE | \
 138                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 139                                          CF_ACR_EN | CF_ACR_SM_ALL)
 140 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_BEC | CF_CACR_IEC | \
 141                                          CF_CACR_ICINVA | CF_CACR_EUSP)
 142 #define CONFIG_SYS_CACHE_DCACR          ((CONFIG_SYS_CACHE_ICACR | \
 143                                          CF_CACR_DEC | CF_CACR_DDCM_P | \
 144                                          CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
 145
 146 #define CACR_STATUS                     (CONFIG_SYS_INIT_RAM_ADDR + \
 147                                         CONFIG_SYS_INIT_RAM_SIZE - 12)
 148
 149 #ifdef CONFIG_MCFFEC
 150 #define CONFIG_MII_INIT                 1
 151 #define CONFIG_SYS_DISCOVER_PHY
 152 #define CONFIG_SYS_RX_ETH_BUFFER        8
 153 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 154 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
 155 #ifndef CONFIG_SYS_DISCOVER_PHY
 156 #define FECDUPLEX                       FULL
 157 #define FECSPEED                        _100BASET
 158 #else
 159 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 160 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 161 #endif
 162 #endif /* CONFIG_SYS_DISCOVER_PHY */
 163 #endif
 164 #endif /* __STMARK2_CONFIG_H */