Merge tag 'mips-pull-2020-06-29' of https://gitlab.denx.de/u-boot/custodians/u-boot...
[platform/kernel/u-boot.git] / include / configs / stmark2.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Sysam stmark2 board configuration
4  *
5  * (C) Copyright 2017  Angelo Dureghello <angelo@sysam.it>
6  */
7
8 #ifndef __STMARK2_CONFIG_H
9 #define __STMARK2_CONFIG_H
10
11 #define CONFIG_HOSTNAME                 "stmark2"
12
13 #define CONFIG_MCFUART
14 #define CONFIG_SYS_UART_PORT            0
15 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600 , 19200 , 38400 , 57600, 115200 }
16
17 #define LDS_BOARD_TEXT                                          \
18         board/sysam/stmark2/sbf_dram_init.o (.text*)
19
20 #define CONFIG_TIMESTAMP
21
22 #define CONFIG_BOOTCOMMAND                                      \
23         "sf probe 0:1 50000000; "                               \
24         "sf read ${loadaddr} 0x100000 ${kern_size}; "           \
25         "bootm ${loadaddr}"
26
27 #define CONFIG_EXTRA_ENV_SETTINGS                               \
28         "kern_size=0x700000\0"                                  \
29         "loadaddr=0x40001000\0"                                 \
30                 "-(rootfs)\0"                                   \
31         "update_uboot=loady ${loadaddr}; "                      \
32                 "sf probe 0:1 50000000; "                       \
33                 "sf erase 0 0x80000; "                          \
34                 "sf write ${loadaddr} 0 ${filesize}\0"          \
35         "update_kernel=loady ${loadaddr}; "                     \
36                 "setenv kern_size ${filesize}; saveenv; "       \
37                 "sf probe 0:1 50000000; "                       \
38                 "sf erase 0x100000 0x700000; "                  \
39                 "sf write ${loadaddr} 0x100000 ${filesize}\0"   \
40         "update_rootfs=loady ${loadaddr}; "                     \
41                 "sf probe 0:1 50000000; "                       \
42                 "sf erase 0x00800000 0x100000; "                \
43                 "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
44         ""
45
46 /* Realtime clock */
47 #undef CONFIG_MCFRTC
48 #define CONFIG_RTC_MCFRRTC
49 #define CONFIG_SYS_MCFRRTC_BASE         0xFC0A8000
50
51 /* spi not partitions */
52 #define CONFIG_JFFS2_CMDLINE
53 #define CONFIG_JFFS2_DEV                "nor0"
54
55 /* Timer */
56 #define CONFIG_MCFTMR
57
58 /* DSPI and Serial Flash */
59 #define CONFIG_CF_DSPI
60 #define CONFIG_SERIAL_FLASH
61
62 #define CONFIG_SYS_SBFHDR_SIZE          0x7
63
64 /* Input, PCI, Flexbus, and VCO */
65 #define CONFIG_EXTRA_CLOCK
66
67 #define CONFIG_PRAM                     2048    /* 2048 KB */
68 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
69
70 /* Print Buffer Size */
71 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
72                                         sizeof(CONFIG_SYS_PROMPT) + 16)
73 #define CONFIG_SYS_MAXARGS              16
74 /* Boot Argument Buffer Size    */
75 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
76
77 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x10000)
78 #define CONFIG_SYS_MBAR                 0xFC000000
79
80 /*
81  * Definitions for initial stack pointer and data area (in internal SRAM)
82  */
83 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
84 /* End of used area in internal SRAM */
85 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000
86 #define CONFIG_SYS_INIT_RAM_CTRL        0x221
87 #define CONFIG_SYS_GBL_DATA_OFFSET      ((CONFIG_SYS_INIT_RAM_SIZE - \
88                                         GENERATED_GBL_DATA_SIZE) - 32)
89 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
90 #define CONFIG_SYS_SBFHDR_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_SIZE - 32)
91
92 /*
93  * Start addresses for the final memory configuration
94  * (Set up by the startup code)
95  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
96  */
97 #define CONFIG_SYS_SDRAM_BASE           0x40000000
98 #define CONFIG_SYS_SDRAM_SIZE           128     /* SDRAM size in MB */
99
100 #define CONFIG_SYS_DRAM_TEST
101
102 #if defined(CONFIG_CF_SBF)
103 #define CONFIG_SERIAL_BOOT
104 #endif
105
106 #if defined(CONFIG_SERIAL_BOOT)
107 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_TEXT_BASE + 0x400)
108 #else
109 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_FLASH_BASE + 0x400)
110 #endif
111
112 #define CONFIG_SYS_BOOTPARAMS_LEN       (64 * 1024)
113 /* Reserve 256 kB for Monitor */
114 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
115 /* Reserve 256 kB for malloc() */
116 #define CONFIG_SYS_MALLOC_LEN           (256 << 10)
117
118 /*
119  * For booting Linux, the board info and command line data
120  * have to be in the first 8 MB of memory, since this is
121  * the maximum mapped by the Linux kernel during initialization ??
122  */
123 /* Initial Memory map for Linux */
124 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + \
125                                         (CONFIG_SYS_SDRAM_SIZE << 20))
126
127 /* Configuration for environment
128  * Environment is embedded in u-boot in the second sector of the flash
129  */
130
131 #if defined(CONFIG_CF_SBF)
132 #define CONFIG_ENV_IS_IN_SPI_FLASH      1
133 #endif
134
135 #undef CONFIG_ENV_OVERWRITE
136
137 /* Cache Configuration */
138 #define CONFIG_SYS_CACHELINE_SIZE       16
139 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
140                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
141 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
142                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
143 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_BCINVA + CF_CACR_ICINVA)
144 #define CONFIG_SYS_DCACHE_INV           (CF_CACR_DCINVA)
145 #define CONFIG_SYS_CACHE_ACR2           (CONFIG_SYS_SDRAM_BASE | \
146                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
147                                          CF_ACR_EN | CF_ACR_SM_ALL)
148 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_BEC | CF_CACR_IEC | \
149                                          CF_CACR_ICINVA | CF_CACR_EUSP)
150 #define CONFIG_SYS_CACHE_DCACR          ((CONFIG_SYS_CACHE_ICACR | \
151                                          CF_CACR_DEC | CF_CACR_DDCM_P | \
152                                          CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
153
154 #define CACR_STATUS                     (CONFIG_SYS_INIT_RAM_ADDR + \
155                                         CONFIG_SYS_INIT_RAM_SIZE - 12)
156
157 #ifdef CONFIG_MCFFEC
158 #define CONFIG_MII_INIT                 1
159 #define CONFIG_SYS_DISCOVER_PHY
160 #define CONFIG_SYS_RX_ETH_BUFFER        8
161 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
162 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
163 #ifndef CONFIG_SYS_DISCOVER_PHY
164 #define FECDUPLEX                       FULL
165 #define FECSPEED                        _100BASET
166 #else
167 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
168 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
169 #endif
170 #endif /* CONFIG_SYS_DISCOVER_PHY */
171 #endif
172 #endif /* __STMARK2_CONFIG_H */