include/configs/stmark2.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Sysam stmark2 board configuration
   4  *
   5  * (C) Copyright 2017  Angelo Dureghello <angelo@sysam.it>
   6  */
   7
   8 #ifndef __STMARK2_CONFIG_H
   9 #define __STMARK2_CONFIG_H
  10
  11 #define CONFIG_HOSTNAME                 "stmark2"
  12
  13 #define CONFIG_SYS_UART_PORT            0
  14
  15 #define LDS_BOARD_TEXT                                          \
  16         board/sysam/stmark2/sbf_dram_init.o (.text*)
  17
  18 #define CONFIG_EXTRA_ENV_SETTINGS                               \
  19         "kern_size=0x700000\0"                                  \
  20         "loadaddr=0x40001000\0"                                 \
  21                 "-(rootfs)\0"                                   \
  22         "update_uboot=loady ${loadaddr}; "                      \
  23                 "sf probe 0:1 50000000; "                       \
  24                 "sf erase 0 0x80000; "                          \
  25                 "sf write ${loadaddr} 0 ${filesize}\0"          \
  26         "update_kernel=loady ${loadaddr}; "                     \
  27                 "setenv kern_size ${filesize}; saveenv; "       \
  28                 "sf probe 0:1 50000000; "                       \
  29                 "sf erase 0x100000 0x700000; "                  \
  30                 "sf write ${loadaddr} 0x100000 ${filesize}\0"   \
  31         "update_rootfs=loady ${loadaddr}; "                     \
  32                 "sf probe 0:1 50000000; "                       \
  33                 "sf erase 0x00800000 0x100000; "                \
  34                 "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
  35         ""
  36
  37 /* Realtime clock */
  38 #undef CONFIG_MCFRTC
  39 #define CONFIG_RTC_MCFRRTC
  40 #define CONFIG_SYS_MCFRRTC_BASE         0xFC0A8000
  41
  42 /* Timer */
  43 #define CONFIG_MCFTMR
  44
  45 /* DSPI and Serial Flash */
  46 #define CONFIG_CF_DSPI
  47 #define CONFIG_SERIAL_FLASH
  48
  49 #define CONFIG_SYS_SBFHDR_SIZE          0x7
  50
  51 /* Input, PCI, Flexbus, and VCO */
  52 #define CONFIG_EXTRA_CLOCK
  53
  54 #define CONFIG_PRAM                     2048    /* 2048 KB */
  55 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
  56
  57 /* Print Buffer Size */
  58 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
  59                                         sizeof(CONFIG_SYS_PROMPT) + 16)
  60 #define CONFIG_SYS_MAXARGS              16
  61 /* Boot Argument Buffer Size    */
  62 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  63
  64 #define CONFIG_SYS_MBAR                 0xFC000000
  65
  66 /*
  67  * Definitions for initial stack pointer and data area (in internal SRAM)
  68  */
  69 #define CONFIG_SYS_INIT_RAM_ADDR        0x80000000
  70 /* End of used area in internal SRAM */
  71 #define CONFIG_SYS_INIT_RAM_SIZE        0x10000
  72 #define CONFIG_SYS_INIT_RAM_CTRL        0x221
  73 #define CONFIG_SYS_GBL_DATA_OFFSET      ((CONFIG_SYS_INIT_RAM_SIZE - \
  74                                         GENERATED_GBL_DATA_SIZE) - 32)
  75 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
  76 #define CONFIG_SYS_SBFHDR_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_SIZE - 32)
  77
  78 /*
  79  * Start addresses for the final memory configuration
  80  * (Set up by the startup code)
  81  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  82  */
  83 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  84 #define CONFIG_SYS_SDRAM_SIZE           128     /* SDRAM size in MB */
  85
  86 #define CONFIG_SYS_DRAM_TEST
  87
  88 #if defined(CONFIG_CF_SBF)
  89 #define CONFIG_SERIAL_BOOT
  90 #endif
  91
  92 #if defined(CONFIG_SERIAL_BOOT)
  93 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_TEXT_BASE + 0x400)
  94 #else
  95 #define CONFIG_SYS_MONITOR_BASE         (CONFIG_SYS_FLASH_BASE + 0x400)
  96 #endif
  97
  98 #define CONFIG_SYS_BOOTPARAMS_LEN       (64 * 1024)
  99 /* Reserve 256 kB for Monitor */
 100 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
 101
 102 /*
 103  * For booting Linux, the board info and command line data
 104  * have to be in the first 8 MB of memory, since this is
 105  * the maximum mapped by the Linux kernel during initialization ??
 106  */
 107 /* Initial Memory map for Linux */
 108 #define CONFIG_SYS_BOOTMAPSZ            (CONFIG_SYS_SDRAM_BASE + \
 109                                         (CONFIG_SYS_SDRAM_SIZE << 20))
 110
 111 /* Configuration for environment
 112  * Environment is embedded in u-boot in the second sector of the flash
 113  */
 114
 115 /* Cache Configuration */
 116 #define ICACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 117                                          CONFIG_SYS_INIT_RAM_SIZE - 8)
 118 #define DCACHE_STATUS                   (CONFIG_SYS_INIT_RAM_ADDR + \
 119                                          CONFIG_SYS_INIT_RAM_SIZE - 4)
 120 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_BCINVA + CF_CACR_ICINVA)
 121 #define CONFIG_SYS_DCACHE_INV           (CF_CACR_DCINVA)
 122 #define CONFIG_SYS_CACHE_ACR2           (CONFIG_SYS_SDRAM_BASE | \
 123                                          CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
 124                                          CF_ACR_EN | CF_ACR_SM_ALL)
 125 #define CONFIG_SYS_CACHE_ICACR          (CF_CACR_BEC | CF_CACR_IEC | \
 126                                          CF_CACR_ICINVA | CF_CACR_EUSP)
 127 #define CONFIG_SYS_CACHE_DCACR          ((CONFIG_SYS_CACHE_ICACR | \
 128                                          CF_CACR_DEC | CF_CACR_DDCM_P | \
 129                                          CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
 130
 131 #define CACR_STATUS                     (CONFIG_SYS_INIT_RAM_ADDR + \
 132                                         CONFIG_SYS_INIT_RAM_SIZE - 12)
 133
 134 #ifdef CONFIG_MCFFEC
 135 #define CONFIG_SYS_DISCOVER_PHY
 136 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
 137 #ifndef CONFIG_SYS_DISCOVER_PHY
 138 #define FECDUPLEX                       FULL
 139 #define FECSPEED                        _100BASET
 140 #endif /* CONFIG_SYS_DISCOVER_PHY */
 141 #endif
 142 #endif /* __STMARK2_CONFIG_H */