3 * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef _SPEAR_COMMON_H
9 #define _SPEAR_COMMON_H
11 * Common configurations used for both spear3xx as well as spear6xx
14 /* U-Boot Load Address */
15 #define CONFIG_SYS_TEXT_BASE 0x00700000
17 /* Ethernet driver configuration */
19 #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
20 #define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
22 /* USBD driver configuration */
23 #if defined(CONFIG_SPEAR_USBTTY)
25 #define CONFIG_USB_DEVICE
26 #define CONFIG_USBD_HS
27 #define CONFIG_USB_TTY
29 #define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC"
30 #define CONFIG_USBD_MANUFACTURER "ST Microelectronics"
34 #define CONFIG_EXTRA_ENV_USBTTY "usbtty=cdc_acm\0"
36 /* I2C driver configuration */
37 #define CONFIG_SYS_I2C
38 #if defined(CONFIG_SPEAR600)
39 #define CONFIG_SYS_I2C_BASE 0xD0200000
40 #elif defined(CONFIG_SPEAR300)
41 #define CONFIG_SYS_I2C_BASE 0xD0180000
42 #elif defined(CONFIG_SPEAR310)
43 #define CONFIG_SYS_I2C_BASE 0xD0180000
44 #elif defined(CONFIG_SPEAR320)
45 #define CONFIG_SYS_I2C_BASE 0xD0180000
47 #define CONFIG_SYS_I2C_SPEED 400000
48 #define CONFIG_SYS_I2C_SLAVE 0x02
50 #define CONFIG_I2C_CHIPADDRESS 0x50
52 /* Timer, HZ specific defines */
54 /* Flash configuration */
55 #if defined(CONFIG_FLASH_PNOR)
56 #define CONFIG_SPEAR_EMI
61 #if defined(CONFIG_ST_SMI)
63 #define CONFIG_SYS_MAX_FLASH_BANKS 2
64 #define CONFIG_SYS_FLASH_BASE 0xF8000000
65 #define CONFIG_SYS_CS1_FLASH_BASE 0xF9000000
66 #define CONFIG_SYS_FLASH_BANK_SIZE 0x01000000
67 #define CONFIG_SYS_FLASH_ADDR_BASE {CONFIG_SYS_FLASH_BASE, \
68 CONFIG_SYS_CS1_FLASH_BASE}
69 #define CONFIG_SYS_MAX_FLASH_SECT 128
71 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ)
72 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ)
77 * Serial Configuration (PL011)
78 * CONFIG_PL01x_PORTS is defined in specific files
80 #define CONFIG_PL011_SERIAL
81 #define CONFIG_PL011_CLOCK (48 * 1000 * 1000)
82 #define CONFIG_CONS_INDEX 0
83 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \
86 #define CONFIG_SYS_LOADS_BAUD_CHANGE
88 /* NAND FLASH Configuration */
89 #define CONFIG_SYS_NAND_SELF_INIT
90 #define CONFIG_MTD_DEVICE
91 #define CONFIG_MTD_PARTITIONS
92 #define CONFIG_NAND_FSMC
93 #define CONFIG_SYS_MAX_NAND_DEVICE 1
94 #define CONFIG_SYS_NAND_ONFI_DETECTION
97 * Command support defines
99 #define CONFIG_CMD_SAVES
102 * Default Environment Varible definitions
104 #define CONFIG_ENV_OVERWRITE
107 * U-Boot Environment placing definitions.
109 #if defined(CONFIG_ENV_IS_IN_FLASH)
112 * Environment is in serial NOR flash
114 #define CONFIG_SYS_MONITOR_LEN 0x00040000
115 #define CONFIG_ENV_SECT_SIZE 0x00010000
116 #define CONFIG_FSMTDBLK "/dev/mtdblock3 "
118 #define CONFIG_BOOTCOMMAND "bootm 0xf8050000"
120 #elif defined(CONFIG_SPEAR_EMI)
122 * Environment is in parallel NOR flash
124 #define CONFIG_SYS_MONITOR_LEN 0x00060000
125 #define CONFIG_ENV_SECT_SIZE 0x00020000
126 #define CONFIG_FSMTDBLK "/dev/mtdblock3 "
128 #define CONFIG_BOOTCOMMAND "cp.b 0x50080000 0x1600000 " \
129 "0x4C0000; bootm 0x1600000"
132 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \
133 CONFIG_SYS_MONITOR_LEN)
134 #elif defined(CONFIG_ENV_IS_IN_NAND)
136 * Environment is in NAND
139 #define CONFIG_ENV_OFFSET 0x60000
140 #define CONFIG_ENV_RANGE 0x10000
141 #define CONFIG_FSMTDBLK "/dev/mtdblock7 "
143 #define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \
144 "0x80000 0x4C0000; " \
148 #define CONFIG_BOOTARGS "console=ttyAMA0,115200 " \
150 "root="CONFIG_FSMTDBLK \
153 #define CONFIG_NFSBOOTCOMMAND \
155 "setenv bootargs root=/dev/nfs rw " \
156 "nfsroot=$(serverip):$(rootpath) " \
157 "ip=$(ipaddr):$(serverip):$(gatewayip):" \
158 "$(netmask):$(hostname):$(netdev):off " \
159 "console=ttyAMA0,115200 $(othbootargs);" \
162 #define CONFIG_RAMBOOTCOMMAND \
163 "setenv bootargs root=/dev/ram rw " \
164 "console=ttyAMA0,115200 $(othbootargs);" \
167 #define CONFIG_ENV_SIZE 0x02000
168 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
170 /* Miscellaneous configurable options */
171 #define CONFIG_ARCH_CPU_INIT
172 #define CONFIG_BOOT_PARAMS_ADDR 0x00000100
173 #define CONFIG_CMDLINE_TAG
174 #define CONFIG_SETUP_MEMORY_TAGS
175 #define CONFIG_MISC_INIT_R
177 #define CONFIG_SYS_MEMTEST_START 0x00800000
178 #define CONFIG_SYS_MEMTEST_END 0x04000000
179 #define CONFIG_SYS_MALLOC_LEN (1024*1024)
180 #define CONFIG_SYS_LONGHELP
181 #define CONFIG_CMDLINE_EDITING
182 #define CONFIG_SYS_CBSIZE 256
183 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
184 sizeof(CONFIG_SYS_PROMPT) + 16)
185 #define CONFIG_SYS_MAXARGS 16
186 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
187 #define CONFIG_SYS_LOAD_ADDR 0x00800000
189 #define CONFIG_SYS_FLASH_EMPTY_INFO
191 /* Physical Memory Map */
192 #define CONFIG_NR_DRAM_BANKS 1
193 #define PHYS_SDRAM_1 0x00000000
194 #define PHYS_SDRAM_1_MAXSIZE 0x40000000
196 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
197 #define CONFIG_SYS_INIT_RAM_ADDR 0xD2800000
198 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000
200 #define CONFIG_SYS_INIT_SP_OFFSET \
201 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
203 #define CONFIG_SYS_INIT_SP_ADDR \
204 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)