x86: baytrail: Add all IDE/SATA PCI device IDs
[platform/kernel/u-boot.git] / include / configs / spear-common.h
1 /*
2  * (C) Copyright 2009
3  * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  */
7
8 #ifndef _SPEAR_COMMON_H
9 #define _SPEAR_COMMON_H
10 /*
11  * Common configurations used for both spear3xx as well as spear6xx
12  */
13
14 #define CONFIG_SYS_GENERIC_BOARD
15
16 /* U-boot Load Address */
17 #define CONFIG_SYS_TEXT_BASE                    0x00700000
18
19 /* Ethernet driver configuration */
20 #define CONFIG_MII
21 #define CONFIG_PHYLIB
22 #define CONFIG_PHY_RESET_DELAY                  10000           /* in usec */
23 #define CONFIG_PHY_GIGE                 /* Include GbE speed/duplex detection */
24
25 /* USBD driver configuration */
26 #if defined(CONFIG_SPEAR_USBTTY)
27 #define CONFIG_DW_UDC
28 #define CONFIG_USB_DEVICE
29 #define CONFIG_USBD_HS
30 #define CONFIG_USB_TTY
31
32 #define CONFIG_USBD_PRODUCT_NAME                "SPEAr SoC"
33 #define CONFIG_USBD_MANUFACTURER                "ST Microelectronics"
34
35 #endif
36
37 #define CONFIG_EXTRA_ENV_USBTTY                 "usbtty=cdc_acm\0"
38
39 /* I2C driver configuration */
40 #define CONFIG_SYS_I2C
41 #define CONFIG_SYS_I2C_DW
42 #if defined(CONFIG_SPEAR600)
43 #define CONFIG_SYS_I2C_BASE                     0xD0200000
44 #elif defined(CONFIG_SPEAR300)
45 #define CONFIG_SYS_I2C_BASE                     0xD0180000
46 #elif defined(CONFIG_SPEAR310)
47 #define CONFIG_SYS_I2C_BASE                     0xD0180000
48 #elif defined(CONFIG_SPEAR320)
49 #define CONFIG_SYS_I2C_BASE                     0xD0180000
50 #endif
51 #define CONFIG_SYS_I2C_SPEED                    400000
52 #define CONFIG_SYS_I2C_SLAVE                    0x02
53
54 #define CONFIG_I2C_CHIPADDRESS                  0x50
55
56 /* Timer, HZ specific defines */
57
58 /* Flash configuration */
59 #if defined(CONFIG_FLASH_PNOR)
60 #define CONFIG_SPEAR_EMI
61 #else
62 #define CONFIG_ST_SMI
63 #endif
64
65 #if defined(CONFIG_ST_SMI)
66
67 #define CONFIG_SYS_MAX_FLASH_BANKS              2
68 #define CONFIG_SYS_FLASH_BASE                   0xF8000000
69 #define CONFIG_SYS_CS1_FLASH_BASE               0xF9000000
70 #define CONFIG_SYS_FLASH_BANK_SIZE              0x01000000
71 #define CONFIG_SYS_FLASH_ADDR_BASE              {CONFIG_SYS_FLASH_BASE, \
72                                                 CONFIG_SYS_CS1_FLASH_BASE}
73 #define CONFIG_SYS_MAX_FLASH_SECT               128
74
75 #define CONFIG_SYS_FLASH_ERASE_TOUT             (3 * CONFIG_SYS_HZ)
76 #define CONFIG_SYS_FLASH_WRITE_TOUT             (3 * CONFIG_SYS_HZ)
77
78 #endif
79
80 /*
81  * Serial Configuration (PL011)
82  * CONFIG_PL01x_PORTS is defined in specific files
83  */
84 #define CONFIG_PL011_SERIAL
85 #define CONFIG_PL011_CLOCK                      (48 * 1000 * 1000)
86 #define CONFIG_CONS_INDEX                       0
87 #define CONFIG_BAUDRATE                         115200
88 #define CONFIG_SYS_BAUDRATE_TABLE               { 9600, 19200, 38400, \
89                                                 57600, 115200 }
90
91 #define CONFIG_SYS_LOADS_BAUD_CHANGE
92
93 /* NAND FLASH Configuration */
94 #define CONFIG_SYS_NAND_SELF_INIT
95 #define CONFIG_MTD_DEVICE
96 #define CONFIG_MTD_PARTITIONS
97 #define CONFIG_NAND_FSMC
98 #define CONFIG_SYS_MAX_NAND_DEVICE              1
99 #define CONFIG_SYS_NAND_ONFI_DETECTION
100 #define CONFIG_SYS_NAND_QUIET_TEST
101
102 /*
103  * Command support defines
104  */
105 #define CONFIG_CMD_I2C
106 #define CONFIG_CMD_NAND
107 #define CONFIG_CMD_ENV
108 #define CONFIG_CMD_SAVES
109 #define CONFIG_CMD_MII
110 #define CONFIG_CMD_PING
111 #define CONFIG_CMD_DHCP
112
113 /*
114  * Default Environment Varible definitions
115  */
116 #if defined(CONFIG_SPEAR_USBTTY)
117 #define CONFIG_BOOTDELAY                        -1
118 #else
119 #define CONFIG_BOOTDELAY                        1
120 #endif
121
122 #define CONFIG_ENV_OVERWRITE
123
124 /*
125  * U-Boot Environment placing definitions.
126  */
127 #if defined(CONFIG_ENV_IS_IN_FLASH)
128 #ifdef CONFIG_ST_SMI
129 /*
130  * Environment is in serial NOR flash
131  */
132 #define CONFIG_SYS_MONITOR_LEN                  0x00040000
133 #define CONFIG_ENV_SECT_SIZE                    0x00010000
134 #define CONFIG_FSMTDBLK                         "/dev/mtdblock3 "
135
136 #define CONFIG_BOOTCOMMAND                      "bootm 0xf8050000"
137
138 #elif defined(CONFIG_SPEAR_EMI)
139 /*
140  * Environment is in parallel NOR flash
141  */
142 #define CONFIG_SYS_MONITOR_LEN                  0x00060000
143 #define CONFIG_ENV_SECT_SIZE                    0x00020000
144 #define CONFIG_FSMTDBLK                         "/dev/mtdblock3 "
145
146 #define CONFIG_BOOTCOMMAND                      "cp.b 0x50080000 0x1600000 " \
147                                                 "0x4C0000; bootm 0x1600000"
148 #endif
149
150 #define CONFIG_ENV_ADDR                         (CONFIG_SYS_FLASH_BASE + \
151                                                 CONFIG_SYS_MONITOR_LEN)
152 #elif defined(CONFIG_ENV_IS_IN_NAND)
153 /*
154  * Environment is in NAND
155  */
156
157 #define CONFIG_ENV_OFFSET                       0x60000
158 #define CONFIG_ENV_RANGE                        0x10000
159 #define CONFIG_FSMTDBLK                         "/dev/mtdblock7 "
160
161 #define CONFIG_BOOTCOMMAND                      "nand read.jffs2 0x1600000 " \
162                                                 "0x80000 0x4C0000; " \
163                                                 "bootm 0x1600000"
164 #endif
165
166 #define CONFIG_BOOTARGS                         "console=ttyAMA0,115200 " \
167                                                 "mem=128M " \
168                                                 "root="CONFIG_FSMTDBLK \
169                                                 "rootfstype=jffs2"
170
171 #define CONFIG_NFSBOOTCOMMAND                                           \
172         "bootp; "                                                       \
173         "setenv bootargs root=/dev/nfs rw "                             \
174         "nfsroot=$(serverip):$(rootpath) "                              \
175         "ip=$(ipaddr):$(serverip):$(gatewayip):"                        \
176                         "$(netmask):$(hostname):$(netdev):off "         \
177                         "console=ttyAMA0,115200 $(othbootargs);"        \
178         "bootm; "
179
180 #define CONFIG_RAMBOOTCOMMAND                                           \
181         "setenv bootargs root=/dev/ram rw "                             \
182                 "console=ttyAMA0,115200 $(othbootargs);"                \
183         CONFIG_BOOTCOMMAND
184
185
186 #define CONFIG_ENV_SIZE                         0x02000
187 #define CONFIG_SYS_MONITOR_BASE                 CONFIG_SYS_TEXT_BASE
188
189 /* Miscellaneous configurable options */
190 #define CONFIG_ARCH_CPU_INIT
191 #define CONFIG_BOARD_EARLY_INIT_F
192 #define CONFIG_DISPLAY_CPUINFO
193 #define CONFIG_BOOT_PARAMS_ADDR                 0x00000100
194 #define CONFIG_CMDLINE_TAG
195 #define CONFIG_SETUP_MEMORY_TAGS
196 #define CONFIG_MISC_INIT_R
197 #define CONFIG_ZERO_BOOTDELAY_CHECK
198
199 #define CONFIG_SYS_MEMTEST_START                0x00800000
200 #define CONFIG_SYS_MEMTEST_END                  0x04000000
201 #define CONFIG_SYS_MALLOC_LEN                   (1024*1024)
202 #define CONFIG_IDENT_STRING                     "-SPEAr"
203 #define CONFIG_SYS_LONGHELP
204 #define CONFIG_CMDLINE_EDITING
205 #define CONFIG_SYS_CBSIZE                       256
206 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE + \
207                                                 sizeof(CONFIG_SYS_PROMPT) + 16)
208 #define CONFIG_SYS_MAXARGS                      16
209 #define CONFIG_SYS_BARGSIZE                     CONFIG_SYS_CBSIZE
210 #define CONFIG_SYS_LOAD_ADDR                    0x00800000
211 #define CONFIG_SYS_CONSOLE_INFO_QUIET
212
213 #define CONFIG_SYS_FLASH_EMPTY_INFO
214
215 /* Physical Memory Map */
216 #define CONFIG_NR_DRAM_BANKS                    1
217 #define PHYS_SDRAM_1                            0x00000000
218 #define PHYS_SDRAM_1_MAXSIZE                    0x40000000
219
220 #define CONFIG_SYS_SDRAM_BASE                   PHYS_SDRAM_1
221 #define CONFIG_SYS_INIT_RAM_ADDR                0xD2800000
222 #define CONFIG_SYS_INIT_RAM_SIZE                0x2000
223
224 #define CONFIG_SYS_INIT_SP_OFFSET               \
225         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
226
227 #define CONFIG_SYS_INIT_SP_ADDR                 \
228         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
229
230 #endif