include/configs/spear-common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2009
   4  * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
   5  */
   6
   7 #ifndef _SPEAR_COMMON_H
   8 #define _SPEAR_COMMON_H
   9 /*
  10  * Common configurations used for both spear3xx as well as spear6xx
  11  */
  12
  13 /* U-Boot Load Address */
  14
  15 /* Ethernet driver configuration */
  16 #define CONFIG_PHY_RESET_DELAY                  10000           /* in usec */
  17
  18 /* USBD driver configuration */
  19 #if defined(CONFIG_SPEAR_USBTTY)
  20 #define CONFIG_DW_UDC
  21 #define CONFIG_USB_DEVICE
  22 #define CONFIG_USBD_HS
  23 #define CONFIG_USB_TTY
  24
  25 #define CONFIG_USBD_PRODUCT_NAME                "SPEAr SoC"
  26 #define CONFIG_USBD_MANUFACTURER                "ST Microelectronics"
  27
  28 #endif
  29
  30 #define CONFIG_EXTRA_ENV_USBTTY                 "usbtty=cdc_acm\0"
  31
  32 /* I2C driver configuration */
  33 #define CONFIG_SYS_I2C
  34 #if defined(CONFIG_SPEAR600)
  35 #define CONFIG_SYS_I2C_BASE                     0xD0200000
  36 #elif defined(CONFIG_SPEAR300)
  37 #define CONFIG_SYS_I2C_BASE                     0xD0180000
  38 #elif defined(CONFIG_SPEAR310)
  39 #define CONFIG_SYS_I2C_BASE                     0xD0180000
  40 #elif defined(CONFIG_SPEAR320)
  41 #define CONFIG_SYS_I2C_BASE                     0xD0180000
  42 #endif
  43 #define CONFIG_SYS_I2C_SPEED                    400000
  44 #define CONFIG_SYS_I2C_SLAVE                    0x02
  45
  46 #define CONFIG_I2C_CHIPADDRESS                  0x50
  47
  48 /* Timer, HZ specific defines */
  49
  50 /* Flash configuration */
  51 #if defined(CONFIG_FLASH_PNOR)
  52 #define CONFIG_SPEAR_EMI
  53 #else
  54 #define CONFIG_ST_SMI
  55 #endif
  56
  57 #if defined(CONFIG_ST_SMI)
  58
  59 #define CONFIG_SYS_MAX_FLASH_BANKS              2
  60 #define CONFIG_SYS_FLASH_BASE                   0xF8000000
  61 #define CONFIG_SYS_CS1_FLASH_BASE               0xF9000000
  62 #define CONFIG_SYS_FLASH_BANK_SIZE              0x01000000
  63 #define CONFIG_SYS_FLASH_ADDR_BASE              {CONFIG_SYS_FLASH_BASE, \
  64                                                 CONFIG_SYS_CS1_FLASH_BASE}
  65 #define CONFIG_SYS_MAX_FLASH_SECT               128
  66
  67 #define CONFIG_SYS_FLASH_ERASE_TOUT             (3 * CONFIG_SYS_HZ)
  68 #define CONFIG_SYS_FLASH_WRITE_TOUT             (3 * CONFIG_SYS_HZ)
  69
  70 #endif
  71
  72 /*
  73  * Serial Configuration (PL011)
  74  * CONFIG_PL01x_PORTS is defined in specific files
  75  */
  76 #define CONFIG_PL011_CLOCK                      (48 * 1000 * 1000)
  77 #define CONFIG_SYS_BAUDRATE_TABLE               { 9600, 19200, 38400, \
  78                                                 57600, 115200 }
  79
  80 #define CONFIG_SYS_LOADS_BAUD_CHANGE
  81
  82 /* NAND FLASH Configuration */
  83 #define CONFIG_SYS_NAND_SELF_INIT
  84 #define CONFIG_NAND_FSMC
  85 #define CONFIG_SYS_MAX_NAND_DEVICE              1
  86 #define CONFIG_SYS_NAND_ONFI_DETECTION
  87
  88 /*
  89  * Default Environment Varible definitions
  90  */
  91 #define CONFIG_ENV_OVERWRITE
  92
  93 /*
  94  * U-Boot Environment placing definitions.
  95  */
  96 #if defined(CONFIG_ENV_IS_IN_FLASH)
  97 #ifdef CONFIG_ST_SMI
  98 /*
  99  * Environment is in serial NOR flash
 100  */
 101 #define CONFIG_SYS_MONITOR_LEN                  0x00040000
 102 #define CONFIG_FSMTDBLK                         "/dev/mtdblock3 "
 103
 104 #define CONFIG_BOOTCOMMAND                      "bootm 0xf8050000"
 105
 106 #elif defined(CONFIG_SPEAR_EMI)
 107 /*
 108  * Environment is in parallel NOR flash
 109  */
 110 #define CONFIG_SYS_MONITOR_LEN                  0x00060000
 111 #define CONFIG_FSMTDBLK                         "/dev/mtdblock3 "
 112
 113 #define CONFIG_BOOTCOMMAND                      "cp.b 0x50080000 0x1600000 " \
 114                                                 "0x4C0000; bootm 0x1600000"
 115 #endif
 116 #elif defined(CONFIG_ENV_IS_IN_NAND)
 117 /*
 118  * Environment is in NAND
 119  */
 120
 121 #define CONFIG_ENV_RANGE                        0x10000
 122 #define CONFIG_FSMTDBLK                         "/dev/mtdblock7 "
 123
 124 #define CONFIG_BOOTCOMMAND                      "nand read.jffs2 0x1600000 " \
 125                                                 "0x80000 0x4C0000; " \
 126                                                 "bootm 0x1600000"
 127 #endif
 128
 129 #define CONFIG_NFSBOOTCOMMAND                                           \
 130         "bootp; "                                                       \
 131         "setenv bootargs root=/dev/nfs rw "                             \
 132         "nfsroot=$(serverip):$(rootpath) "                              \
 133         "ip=$(ipaddr):$(serverip):$(gatewayip):"                        \
 134                         "$(netmask):$(hostname):$(netdev):off "         \
 135                         "console=ttyAMA0,115200 $(othbootargs);"        \
 136         "bootm; "
 137
 138 #define CONFIG_RAMBOOTCOMMAND                                           \
 139         "setenv bootargs root=/dev/ram rw "                             \
 140                 "console=ttyAMA0,115200 $(othbootargs);"                \
 141         CONFIG_BOOTCOMMAND
 142
 143 #define CONFIG_SYS_MONITOR_BASE                 CONFIG_SYS_TEXT_BASE
 144
 145 /* Miscellaneous configurable options */
 146 #define CONFIG_BOOT_PARAMS_ADDR                 0x00000100
 147 #define CONFIG_CMDLINE_TAG
 148 #define CONFIG_SETUP_MEMORY_TAGS
 149
 150 #define CONFIG_SYS_MEMTEST_START                0x00800000
 151 #define CONFIG_SYS_MEMTEST_END                  0x04000000
 152 #define CONFIG_SYS_MALLOC_LEN                   (1024*1024)
 153 #define CONFIG_SYS_LOAD_ADDR                    0x00800000
 154
 155 #define CONFIG_SYS_FLASH_EMPTY_INFO
 156
 157 /* Physical Memory Map */
 158 #define PHYS_SDRAM_1                            0x00000000
 159 #define PHYS_SDRAM_1_MAXSIZE                    0x40000000
 160
 161 #define CONFIG_SYS_SDRAM_BASE                   PHYS_SDRAM_1
 162 #define CONFIG_SYS_INIT_RAM_ADDR                0xD2800000
 163 #define CONFIG_SYS_INIT_RAM_SIZE                0x2000
 164
 165 #define CONFIG_SYS_INIT_SP_OFFSET               \
 166         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 167
 168 #define CONFIG_SYS_INIT_SP_ADDR                 \
 169         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 170
 171 #endif