2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 //only used in fdl2 .in uart download, the debug infors from serial will break the download process.
24 #define CONFIG_FDL2_PRINT 0
25 #define BOOT_NATIVE_LINUX (1)
27 #define CONFIG_SILENT_CONSOLE
28 #define CONFIG_GPIOLIB 1
31 #define U_BOOT_SPRD_VER 1
32 /*#define SPRD_EVM_TAG_ON 1*/
33 #ifdef SPRD_EVM_TAG_ON
34 #define SPRD_EVM_ADDR_START 0x40006000
35 #define SPRD_EVM_TAG(_x) (*(((unsigned long *)SPRD_EVM_ADDR_START)+_x) = *(volatile unsigned long *)0x87003004)
37 #define CONFIG_L2_OFF 1
41 #define CONFIG_YAFFS2 1
43 #define BOOT_PART "boot"
44 //#define BOOT_PART "kernel"
45 #define RECOVERY_PART "recovery"
47 * SPREADTRUM BIGPHONE board - SoC Configuration
54 #define CHIP_ENDIAN_LITTLE
55 #define SC8800S_LITTLE_ENDIAN FALSE
56 #define _LITTLE_ENDIAN 1
57 #define EXT_MEM_TYPE_DDR 1
60 #define CONFIG_RAM512M
61 #define BB_DRAM_TYPE_256MB_32BIT
62 #define CONFIG_MTD_NAND_SC8810 1
64 #define CONFIG_SYS_HZ 1000
65 #define CONFIG_SPRD_TIMER_CLK 1000 /*32768*/
67 //#define CONFIG_SYS_HUSH_PARSER
69 #ifdef CONFIG_SYS_HUSH_PARSER
70 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
72 #define FIXNV_SIZE (64 * 1024)
73 #define MODEM_SIZE (8 * 1024 * 1024)
74 #define CONFIG_SPL_LOAD_LEN (0x4000)
77 /*#define CMDLINE_NEED_CONV */
79 #define WATCHDOG_LOAD_VALUE 0x4000
80 #define CONFIG_SYS_STACK_SIZE 0x400
82 //#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
84 /* NAND BOOT is the only boot method */
85 #define CONFIG_NAND_U_BOOT
86 #define DYNAMIC_CRC_TABLE
87 /* Start copying real U-boot from the second page */
88 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
89 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x78000
90 #define RAM_TYPPE_IS_SDRAM 0
92 /* Load U-Boot to this address */
93 #define CONFIG_SYS_NAND_U_BOOT_DST 0x0f800000
95 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
96 #define CONFIG_SYS_SDRAM_BASE 0x00000000
97 #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE + 256*1024*1024)
99 #ifdef CONFIG_NAND_SPL
100 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_END - 0x40000)
103 #define CONFIG_MMU_TABLE_ADDR (0x40000000)
104 #define CONFIG_SYS_INIT_SP_ADDR \
105 (CONFIG_SYS_SDRAM_END - 0x10000 - GENERATED_GBL_DATA_SIZE)
107 #define CONFIG_SKIP_LOWLEVEL_INIT
110 #define CONFIG_HW_WATCHDOG
112 #define CONFIG_DISPLAY_CPUINFO
114 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
115 #define CONFIG_SETUP_MEMORY_TAGS 1
116 #define CONFIG_INITRD_TAG 1
122 #define CONFIG_SYS_MALLOC_LEN (2 << 20) /* 1 MiB */
124 * Board has 2 32MB banks of DRAM but there is a bug when using
125 * both so only the first is configured
127 #define CONFIG_NR_DRAM_BANKS 1
129 #define PHYS_SDRAM_1 0x00000000
130 #define PHYS_SDRAM_1_SIZE 0x10000000
131 #if (CONFIG_NR_DRAM_BANKS == 2)
132 #define PHYS_SDRAM_2 0x90000000
133 #define PHYS_SDRAM_2_SIZE 0x02000000
136 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
137 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1+0x0800000)
138 #define CONFIG_STACKSIZE (256 * 1024) /* regular stack */
143 #define CONFIG_SPRD_UART 1
144 #define CONFIG_SYS_SC8800X_UART1 1
145 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */
146 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
147 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
150 * Flash & Environment
152 /* No NOR flash present */
153 #define CONFIG_SYS_MONITOR_LEN ((CONFIG_SYS_NAND_U_BOOT_OFFS)+(CONFIG_SYS_NAND_U_BOOT_SIZE))
154 #define CONFIG_SYS_NO_FLASH 1
155 #define CONFIG_ENV_IS_NOWHERE
156 #define CONFIG_ENV_SIZE (128 * 1024)
158 #define CONFIG_ENV_IS_IN_NAND
159 #define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN
160 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
164 #define CONFIG_NAND_SC8810
165 #define CONFIG_SPRD_NAND_REGS_BASE (0x60000000)
166 #define CONFIG_SYS_MAX_NAND_DEVICE 1
167 #define CONFIG_SYS_NAND_BASE (0x60000000)
168 //#define CONFIG_JFFS2_NAND
169 //#define CONFIG_SPRD_NAND_HWECC
170 #define CONFIG_SYS_NAND_HW_ECC
171 #define CONFIG_SYS_NAND_LARGEPAGE
172 //#define CONFIG_SYS_NAND_5_ADDR_CYCLE
174 #define CONFIG_SYS_64BIT_VSPRINTF
176 #define CONFIG_CMD_MTDPARTS
177 #define CONFIG_MTD_PARTITIONS
178 #define CONFIG_MTD_DEVICE
179 #define CONFIG_CMD_UBI
180 #define CONFIG_RBTREE
182 /* U-Boot general configuration */
183 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
184 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
185 /* Print buffer sz */
186 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
187 sizeof(CONFIG_SYS_PROMPT) + 16)
188 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
189 /* Boot Argument Buffer Size */
190 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
191 #define CONFIG_CMDLINE_EDITING
192 #define CONFIG_SYS_LONGHELP
194 /* support OS choose */
195 #undef CONFIG_BOOTM_NETBSD
196 #undef CONFIG_BOOTM_RTEMS
198 /* U-Boot commands */
199 #include <config_cmd_default.h>
200 #define CONFIG_CMD_NAND
201 #undef CONFIG_CMD_FPGA
202 #undef CONFIG_CMD_LOADS
203 #undef CONFIG_CMD_NET
204 #undef CONFIG_CMD_NFS
205 #undef CONFIG_CMD_SETGETDCR
207 #define CONFIG_ENV_OVERWRITE
209 #ifdef SPRD_EVM_TAG_ON
210 #define CONFIG_BOOTDELAY 0
212 #define CONFIG_BOOTDELAY 0
213 #define CONFIG_ZERO_BOOTDELAY_CHECK
216 #define CONFIG_LOADADDR (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN - 4*1024*1024) /* loadaddr env var */
217 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
219 #define xstr(s) str(s)
222 #define MTDIDS_DEFAULT "nand0=sprd-nand"
223 #ifdef CONFIG_G2PHONE
224 #define MTDPARTS_DEFAULT "mtdparts=sprd-nand:384k@256k(boot),256k(params),6m(kernel),6m(ramdisk),6m(recovery),70m(system),30m(userdata),7m(cache)"
225 #define CONFIG_BOOTARGS "mem=64M console=ttyS1,115200n8 init=/init "MTDPARTS_DEFAULT
226 #elif defined CONFIG_SP8810
227 /*#define MTDPARTS_DEFAULT "mtdparts=sprd-nand:256k(spl),384k(2ndbl),128k(params),512k(vmjaluna),6016k(modem),7680k(kernel),5120k(dsp),1280k(fixnv),2560k(runtimenv),6400k(recovery),100m(system),198m(userdata),1m(boot_logo),1m(fastboot_logo),2m(cache),256k(misc)"*/
228 //#define MTDPARTS_DEFAULT "mtdparts=sprd-nand:256k(spl),512k(2ndbl),128k(params),512k(vmjaluna),10m(modem),10m(boot),5120k(dsp),1280k(fixnv),3840k(backupfixnv),3840k(runtimenv),10m(recovery),150m(system),300m(userdata),1m(boot_logo),1m(fastboot_logo),2m(cache),256k(misc)"
229 //#define MTDPARTS_DEFAULT "mtdparts=sprd-nand:256k(spl),512k(2ndbl),128k(params),512k(vmjaluna),10m(modem),10m(boot)"
230 #define MTDPARTS_DEFAULT "mtdparts=sprd-nand:256k(spl),512k(2ndbl),256k(params),512k(vmjaluna),10m(modem),3840k(fixnv),3840k(backupfixnv),5120k(dsp),3840k(runtimenv),10m(boot),10m(recovery),250m(system),180m(userdata),20m(cache),256k(misc),1m(boot_logo),1m(fastboot_logo),3840k(productinfo),512k(kpanic)"
231 #define CONFIG_BOOTARGS "mem=240M console=ttyS1,115200n8 androidboot.console=ttyS1 init=/init " MTDPARTS_DEFAULT
234 #define CONFIG_LOOP_PER_JIFFY 3350528
235 #define COPY_LINUX_KERNEL_SIZE (0x600000)
236 #define LINUX_INITRD_NAME "modem"
238 #define CONFIG_BOOTCOMMAND "cboot normal"
239 #define CONFIG_EXTRA_ENV_SETTINGS ""
241 #ifdef CONFIG_CMD_NET
242 #define CONFIG_IPADDR 192.168.10.2
243 #define CONFIG_SERVERIP 192.168.10.5
244 #define CONFIG_NETMASK 255.255.255.0
245 #define CONFIG_USBNET_DEVADDR 26:03:ee:00:87:9f
246 #define CONFIG_USBNET_HOSTADDR 9a:04:c7:d6:30:d0
249 #define CONFIG_NET_MULTI
250 #define CONFIG_CMD_DNS
251 #define CONFIG_CMD_NFS
252 #define CONFIG_CMD_RARP
253 #define CONFIG_CMD_PING
254 /*#define CONFIG_CMD_SNTP */
257 #define CONFIG_USB_GADGET_SC8800G
258 #define CONFIG_USB_DWC
259 #define CONFIG_USB_GADGET_DUALSPEED
260 //#define CONFIG_USB_ETHER
261 #define CONFIG_CMD_FASTBOOT
262 #define SCRATCH_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100000)
263 #define FB_DOWNLOAD_BUF_SIZE (250*1024*1024)
265 #define CONFIG_MODEM_CALIBERATE
267 #define CONFIG_UPDATE_TFTP
269 #define CONFIG_OF_LIBFDT
270 #define CONFIG_SYS_MAX_FLASH_BANKS 1
271 #define CONFIG_SYS_MAX_FLASH_SECT 128
275 #define CONFIG_SPLASH_SCREEN
276 #define LCD_BPP LCD_COLOR16
277 //#define CONFIG_LCD_HVGA 1
278 #define CONFIG_LCD_WVGA 1
279 //#define CONFIG_LCD_INFO
280 //#define LCD_TEST_PATTERN
281 //#define CONFIG_LCD_LOGO
282 #define CONFIG_SYS_WHITE_ON_BLACK
283 #define CONFIG_LCD_HX8369
284 #ifdef LCD_TEST_PATTERN
285 #define CONSOLE_COLOR_RED 0xf800
286 #define CONSOLE_COLOR_GREEN 0x07e0
287 #define CONSOLE_COLOR_YELLOW 0x07e0
288 #define CONSOLE_COLOR_BLUE 0x001f
289 #define CONSOLE_COLOR_MAGENTA 0x001f
290 #define CONSOLE_COLOR_CYAN 0x001f
296 #define CONFIG_CMD_MMC
297 #ifdef CONFIG_CMD_MMC
298 #define CONFIG_CMD_FAT 1
299 #define CONFIG_FAT_WRITE 1
301 #define CONFIG_GENERIC_MMC 1
302 #define CONFIG_SDHCI 1
303 #define CONFIG_SYS_MMC_MAX_BLK_COUNT 0x1000
304 #define CONFIG_MMC_SDMA 1
305 #define CONFIG_MV_SDHCI 1
306 #define CONFIG_DOS_PARTITION 1
307 #define CONFIG_EFI_PARTITION 1
308 #define CONFIG_SYS_MMC_NUM 1
309 #define CONFIG_SYS_MMC_BASE {0x20500000}
312 #define CALIBRATE_ENUM_MS 15000
313 #define CALIBRATE_IO_MS 10000
315 #define LOW_BAT_VOL 3500 /*phone battery voltage low than this value will not boot up*/
316 #define LOW_BAT_VOL_CHG 3300 //3.3V charger connect
318 #define PWR_KEY_DETECT_CNT 12 /*this should match the count of boot_pwr_check() function */
319 #define ALARM_LEAD_SET_MS 0 /* time set for alarm boot in advancd */
320 #define USB_PHY_TUNE_VALUE 0x44073e33
322 #endif /* __CONFIG_H */