2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 //only used in fdl2 .in uart download, the debug infors from serial will break the download process.
24 #define CONFIG_FDL2_PRINT 0
25 #define BOOT_NATIVE_LINUX (1)
26 #define CONFIG_USB_CORE_IP_293A
27 #define CONFIG_SILENT_CONSOLE
28 #define CONFIG_GPIOLIB 1
31 #define U_BOOT_SPRD_VER 1
32 /*#define SPRD_EVM_TAG_ON 1*/
33 #ifdef SPRD_EVM_TAG_ON
34 #define SPRD_EVM_ADDR_START 0x40006000
35 #define SPRD_EVM_TAG(_x) (*(((unsigned long *)SPRD_EVM_ADDR_START)+_x) = *(volatile unsigned long *)0x87003004)
37 #define CONFIG_L2_OFF 1
41 #define CONFIG_YAFFS2 1
43 #define BOOT_PART "boot"
44 //#define BOOT_PART "kernel"
45 #define RECOVERY_PART "recovery"
47 * SPREADTRUM BIGPHONE board - SoC Configuration
52 #define CONFIG_SC7710G2
55 #define CHIP_ENDIAN_LITTLE
56 #define SC8800S_LITTLE_ENDIAN FALSE
57 #define _LITTLE_ENDIAN 1
58 #define EXT_MEM_TYPE_DDR 1
61 //#define CONFIG_RAM512M
62 #define BB_DRAM_TYPE_256MB_32BIT
63 #define CONFIG_MTD_NAND_SC8810 1
65 #define CONFIG_SYS_HZ 1000
66 #define CONFIG_SPRD_TIMER_CLK 1000 /*32768*/
68 //#define CONFIG_SYS_HUSH_PARSER
70 #ifdef CONFIG_SYS_HUSH_PARSER
71 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
74 #define FIXNV_SIZE (128 * 1024)
75 #define VMJALUNA_SIZE (0x4B000) /* 300K */
76 #define MODEM_SIZE (0x800000)
77 #define DSP_SIZE (3968 * 1024)
78 #define RUNTIMENV_SIZE (256 * 1024)
79 #define FIRMWARE_SIZE (0x9F8000)
80 #define CONFIG_SPL_LOAD_LEN (0x4000)
83 #define EMMC_SECTOR_SIZE 512
85 /*#define CMDLINE_NEED_CONV */
87 #define WATCHDOG_LOAD_VALUE 0x4000
88 #define CONFIG_SYS_STACK_SIZE 0x400
90 //SDIO HOST NUM for handshake
91 #define SDIO_APCP_HOST_SLOT_NUM 6
93 /* SDIO GPIO HANDSHAKE */
100 //#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
102 /* NAND BOOT is the only boot method */
103 #define CONFIG_NAND_U_BOOT
104 #define DYNAMIC_CRC_TABLE
105 /* Start copying real U-boot from the second page */
106 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
107 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
108 #define RAM_TYPPE_IS_SDRAM 0
110 /* Load U-Boot to this address */
111 #define CONFIG_SYS_NAND_U_BOOT_DST 0x0f800000
113 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
114 #define CONFIG_SYS_SDRAM_BASE 0x00000000
115 #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE + 256*1024*1024)
117 #ifdef CONFIG_NAND_SPL
118 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_END - 0x40000)
121 #define CONFIG_MMU_TABLE_ADDR (0x40000000)
122 #define CONFIG_SYS_INIT_SP_ADDR \
123 (CONFIG_SYS_SDRAM_END - 0x10000 - GENERATED_GBL_DATA_SIZE)
125 #define CONFIG_SKIP_LOWLEVEL_INIT
128 #define CONFIG_HW_WATCHDOG
130 #define CONFIG_DISPLAY_CPUINFO
132 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
133 #define CONFIG_SETUP_MEMORY_TAGS 1
134 #define CONFIG_INITRD_TAG 1
140 #define CONFIG_SYS_MALLOC_LEN (2 << 20) /* 1 MiB */
142 * Board has 2 32MB banks of DRAM but there is a bug when using
143 * both so only the first is configured
145 #define CONFIG_NR_DRAM_BANKS 1
147 #define PHYS_SDRAM_1 0x00000000
148 #define PHYS_SDRAM_1_SIZE 0x10000000
149 #if (CONFIG_NR_DRAM_BANKS == 2)
150 #define PHYS_SDRAM_2 0x90000000
151 #define PHYS_SDRAM_2_SIZE 0x02000000
154 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
155 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1+0x0800000)
156 #define CONFIG_STACKSIZE (256 * 1024) /* regular stack */
161 #define CONFIG_SPRD_UART 1
162 #define CONFIG_SYS_SC8800X_UART1 1
163 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */
164 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
165 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
166 #define CONFIG_SC8825_SPI
167 #define CONFIG_SC8825_I2C
170 * Flash & Environment
172 /* No NOR flash present */
173 #define CONFIG_SYS_MONITOR_LEN ((CONFIG_SYS_NAND_U_BOOT_OFFS)+(CONFIG_SYS_NAND_U_BOOT_SIZE))
174 #define CONFIG_SYS_NO_FLASH 1
175 #define CONFIG_ENV_IS_NOWHERE
176 #define CONFIG_ENV_SIZE (128 * 1024)
178 #define CONFIG_ENV_IS_IN_NAND
179 #define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN
180 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
184 #define CONFIG_NAND_SC8810
185 #define CONFIG_NAND_SC7710G2
186 #define CONFIG_SPRD_NAND_REGS_BASE (0x60000000)
187 #define CONFIG_SYS_MAX_NAND_DEVICE 1
188 #define CONFIG_SYS_NAND_BASE (0x60000000)
189 //#define CONFIG_JFFS2_NAND
190 //#define CONFIG_SPRD_NAND_HWECC
191 #define CONFIG_SYS_NAND_HW_ECC
192 #define CONFIG_SYS_NAND_LARGEPAGE
193 //#define CONFIG_SYS_NAND_5_ADDR_CYCLE
195 #define CONFIG_SYS_64BIT_VSPRINTF
197 #define CONFIG_CMD_MTDPARTS
198 #define CONFIG_MTD_PARTITIONS
199 #define CONFIG_MTD_DEVICE
200 #define CONFIG_CMD_UBI
201 #define CONFIG_RBTREE
203 /* U-Boot general configuration */
204 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
205 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
206 /* Print buffer sz */
207 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
208 sizeof(CONFIG_SYS_PROMPT) + 16)
209 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
210 /* Boot Argument Buffer Size */
211 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
212 #define CONFIG_CMDLINE_EDITING
213 #define CONFIG_SYS_LONGHELP
215 /* support OS choose */
216 #undef CONFIG_BOOTM_NETBSD
217 #undef CONFIG_BOOTM_RTEMS
219 /* U-Boot commands */
220 #include <config_cmd_default.h>
221 #define CONFIG_CMD_NAND
222 #undef CONFIG_CMD_FPGA
223 #undef CONFIG_CMD_LOADS
224 #undef CONFIG_CMD_NET
225 #undef CONFIG_CMD_NFS
226 #undef CONFIG_CMD_SETGETDCR
228 #define CONFIG_ENV_OVERWRITE
230 #ifdef SPRD_EVM_TAG_ON
231 #define CONFIG_BOOTDELAY 0
233 #define CONFIG_BOOTDELAY 0
234 #define CONFIG_ZERO_BOOTDELAY_CHECK
237 #define CONFIG_LOADADDR (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN - 4*1024*1024) /* loadaddr env var */
238 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
240 #define xstr(s) str(s)
243 //#define UART_CONSOLE_SUPPORT
245 #ifdef UART_CONSOLE_SUPPORT
246 #define CONFIG_UART_CONSOLE " console=ttyS1,115200n8 "
248 #define CONFIG_UART_CONSOLE " console=null "
251 #define MTDIDS_DEFAULT "nand0=sprd-nand"
252 #ifdef CONFIG_ROM_8G_SUPPORT
253 #define MTDPARTS_DEFAULT "mtdparts=sprd-nand:256k(spl),512k(2ndbl),256k(params),512k(vmjaluna),10m(modem),3840k(fixnv),3840k(backupfixnv),5120k(dsp),3840k(runtimenv),10m(boot),10m(recovery),260m(system),592m(userdata),100m(cache),256k(misc),1m(boot_logo),1m(fastboot_logo),3840k(productinfo),512k(kpanic),15m(firmware)"
255 #define MTDPARTS_DEFAULT "mtdparts=sprd-nand:256k(spl),512k(2ndbl),256k(params),512k(vmjaluna),10m(modem),3840k(fixnv),3840k(backupfixnv),5120k(dsp),3840k(runtimenv),10m(boot),10m(recovery),260m(system),160m(userdata),20m(cache),256k(misc),1m(boot_logo),1m(fastboot_logo),3840k(productinfo),512k(kpanic),15m(firmware)"
259 /*in sp8810, no enouth uart resource, uart1 will be occupied by ap-cp, so kenrel has to disable console */
260 #ifdef CONFIG_RAM_4G_SUPPORT
261 #define CONFIG_BOOTARGS "mem=512M init=/init "MTDPARTS_DEFAULT CONFIG_UART_CONSOLE
263 #define CONFIG_BOOTARGS "mem=256M init=/init "MTDPARTS_DEFAULT CONFIG_UART_CONSOLE
265 //for uart console debug only #define CONFIG_BOOTARGS "mem=256M console=ttyS1,115200n8 init=/init "MTDPARTS_DEFAULT
268 #define CONFIG_LOOP_PER_JIFFY 3350528
269 //#define COPY_LINUX_KERNEL_SIZE (0x600000)
270 #define LINUX_INITRD_NAME "modem"
272 #define CONFIG_BOOTCOMMAND "cboot normal"
273 #define CONFIG_EXTRA_ENV_SETTINGS ""
275 #ifdef CONFIG_CMD_NET
276 #define CONFIG_IPADDR 192.168.10.2
277 #define CONFIG_SERVERIP 192.168.10.5
278 #define CONFIG_NETMASK 255.255.255.0
279 #define CONFIG_USBNET_DEVADDR 26:03:ee:00:87:9f
280 #define CONFIG_USBNET_HOSTADDR 9a:04:c7:d6:30:d0
283 #define CONFIG_NET_MULTI
284 #define CONFIG_CMD_DNS
285 #define CONFIG_CMD_NFS
286 #define CONFIG_CMD_RARP
287 #define CONFIG_CMD_PING
288 /*#define CONFIG_CMD_SNTP */
291 #define CONFIG_USB_GADGET_SC8800G
292 #define CONFIG_USB_DWC
293 #define CONFIG_USB_GADGET_DUALSPEED
294 //#define CONFIG_USB_ETHER
295 #define CONFIG_CMD_FASTBOOT
296 #define SCRATCH_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100000)
297 #define FB_DOWNLOAD_BUF_SIZE (250*1024*1024)
300 #define CONFIG_CALIBRATION_MODE_NEW
301 #define CONFIG_AP_ADC_CALIBRATION
302 #define CONFIG_MODEM_CALIBERATE
303 //#define CONFIG_MODEM_CALI_UART /* uart calibration only */
304 #define CALIBRATION_CHANNEL 3 // 0 : UART0 1: UART1, 3 uart3
307 #define CONFIG_UPDATE_TFTP
309 #define CONFIG_OF_LIBFDT
310 #define CONFIG_SYS_MAX_FLASH_BANKS 1
311 #define CONFIG_SYS_MAX_FLASH_SECT 128
315 #define CONFIG_MACH_SP7720G2 1
316 #define CONFIG_SPLASH_SCREEN
317 #define LCD_BPP LCD_COLOR16
318 //#define CONFIG_LCD_HVGA 1
319 //#define CONFIG_LCD_WVGA 1
320 //#define CONFIG_LCD_QHD 1
321 #define CONFIG_LCD_FWVGA 1
322 //#define CONFIG_LCD_INFO
323 //#define LCD_TEST_PATTERN
324 //#define CONFIG_LCD_LOGO
325 //#define CONFIG_FB_LCDC_CS1
326 //#define CONFIG_FB_LCD_NT35516_MCU
327 //#define CONFIG_FB_LCD_HX8363_RGB_SPI
328 #define CONFIG_FB_LCD_HX8363_MCU
329 #define CONFIG_SYS_WHITE_ON_BLACK
330 #ifdef LCD_TEST_PATTERN
331 #define CONSOLE_COLOR_RED 0xf800
332 #define CONSOLE_COLOR_GREEN 0x07e0
333 #define CONSOLE_COLOR_YELLOW 0x07e0
334 #define CONSOLE_COLOR_BLUE 0x001f
335 #define CONSOLE_COLOR_MAGENTA 0x001f
336 #define CONSOLE_COLOR_CYAN 0x001f
342 #define CONFIG_CMD_MMC
343 #ifdef CONFIG_CMD_MMC
344 #define CONFIG_CMD_FAT 1
345 #define CONFIG_FAT_WRITE 1
347 #define CONFIG_GENERIC_MMC 1
348 #define CONFIG_SDHCI 1
349 #define CONFIG_SDIO_HOST 1
350 //#define CONFIG_SP8810_MMC
351 //#define CONFIG_SYS_MMC_MAX_BLK_COUNT 0x1000
352 #define CONFIG_MMC_SDMA 1
353 #define CONFIG_MV_SDHCI 1
354 #define CONFIG_DOS_PARTITION 1
355 #define CONFIG_EFI_PARTITION 1
356 #define CONFIG_SYS_MMC_NUM 1
357 #define CONFIG_SYS_MMC_BASE {0x20500000}
360 #define CALIBRATE_ENUM_MS 15000
361 #define CALIBRATE_IO_MS 10000
363 #define LOW_BAT_VOL 3500 /*phone battery voltage low than this value will not boot up*/
364 #define LOW_BAT_VOL_CHG 3300 //3.3V charger connect
366 #define PWR_KEY_DETECT_CNT 12 /*this should match the count of boot_pwr_check() function */
367 #define ALARM_LEAD_SET_MS 0 /* time set for alarm boot in advancd */
368 #define USB_PHY_TUNE_VALUE 0x44073e33
371 #endif /* __CONFIG_H */