2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 //only used in fdl2 .in uart download, the debug infors from serial will break the download process.
24 #define CONFIG_FDL2_PRINT 0
25 #define BOOT_NATIVE_LINUX (1)
27 #define CONFIG_SILENT_CONSOLE
28 #define CONFIG_GPIOLIB 1
31 #define U_BOOT_SPRD_VER 1
32 /*#define SPRD_EVM_TAG_ON 1*/
33 #ifdef SPRD_EVM_TAG_ON
34 #define SPRD_EVM_ADDR_START 0x40006000
35 #define SPRD_EVM_TAG(_x) (*(((unsigned long *)SPRD_EVM_ADDR_START)+_x) = *(volatile unsigned long *)0x87003004)
37 #define CONFIG_L2_OFF 1
41 #define CONFIG_YAFFS2 1
43 #define BOOT_PART "boot"
44 //#define BOOT_PART "kernel"
45 #define RECOVERY_PART "recovery"
47 * SPREADTRUM BIGPHONE board - SoC Configuration
53 //#define CONFIG_NANDLESS
56 #define CHIP_ENDIAN_LITTLE
57 #define SC8800S_LITTLE_ENDIAN FALSE
58 #define _LITTLE_ENDIAN 1
59 #define EXT_MEM_TYPE_DDR 1
62 //#define CONFIG_RAM512M
63 #define BB_DRAM_TYPE_256MB_32BIT
64 #define CONFIG_MTD_NAND_SC8810 1
66 #define CONFIG_SYS_HZ 1000
67 #define CONFIG_SPRD_TIMER_CLK 1000 /*32768*/
69 //#define CONFIG_SYS_HUSH_PARSER
71 #ifdef CONFIG_SYS_HUSH_PARSER
72 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
75 #define FIXNV_SIZE (128 * 1024)
76 #define VMJALUNA_SIZE (0x4B000) /* 300K */
77 #define MODEM_SIZE (0x800000)
78 #define DSP_SIZE (3968 * 1024)
79 #define RUNTIMENV_SIZE (256 * 1024)
80 #define FIRMWARE_SIZE (0x9F8000)
81 #define CONFIG_SPL_LOAD_LEN (0x4000)
84 #define EMMC_SECTOR_SIZE 512
86 /*#define CMDLINE_NEED_CONV */
88 #define WATCHDOG_LOAD_VALUE 0x4000
89 #define CONFIG_SYS_STACK_SIZE 0x400
91 //SDIO HOST NUM for handshake
92 #define SDIO_APCP_HOST_SLOT_NUM 1
94 /* SDIO GPIO HANDSHAKE */
101 //#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
103 /* NAND BOOT is the only boot method */
104 #define CONFIG_NAND_U_BOOT
105 #define DYNAMIC_CRC_TABLE
106 /* Start copying real U-boot from the second page */
107 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
108 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
109 #define RAM_TYPPE_IS_SDRAM 0
111 /* Load U-Boot to this address */
112 #define CONFIG_SYS_NAND_U_BOOT_DST 0x0f800000
114 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
115 #define CONFIG_SYS_SDRAM_BASE 0x00000000
116 #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE + 256*1024*1024)
118 #ifdef CONFIG_NAND_SPL
119 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_END - 0x40000)
122 #define CONFIG_MMU_TABLE_ADDR (0x40000000)
123 #define CONFIG_SYS_INIT_SP_ADDR \
124 (CONFIG_SYS_SDRAM_END - 0x10000 - GENERATED_GBL_DATA_SIZE)
126 #define CONFIG_SKIP_LOWLEVEL_INIT
129 #define CONFIG_HW_WATCHDOG
131 #define CONFIG_DISPLAY_CPUINFO
133 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
134 #define CONFIG_SETUP_MEMORY_TAGS 1
135 #define CONFIG_INITRD_TAG 1
141 #define CONFIG_SYS_MALLOC_LEN (2 << 20) /* 1 MiB */
143 * Board has 2 32MB banks of DRAM but there is a bug when using
144 * both so only the first is configured
146 #define CONFIG_NR_DRAM_BANKS 1
148 #define PHYS_SDRAM_1 0x00000000
149 #define PHYS_SDRAM_1_SIZE 0x10000000
150 #if (CONFIG_NR_DRAM_BANKS == 2)
151 #define PHYS_SDRAM_2 0x90000000
152 #define PHYS_SDRAM_2_SIZE 0x02000000
155 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
156 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1+0x0800000)
157 #define CONFIG_STACKSIZE (256 * 1024) /* regular stack */
162 #define CONFIG_SPRD_UART 1
163 #define CONFIG_SYS_SC8800X_UART1 1
164 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */
165 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
166 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
169 * Flash & Environment
171 /* No NOR flash present */
172 #define CONFIG_SYS_MONITOR_LEN ((CONFIG_SYS_NAND_U_BOOT_OFFS)+(CONFIG_SYS_NAND_U_BOOT_SIZE))
173 #define CONFIG_SYS_NO_FLASH 1
174 #define CONFIG_ENV_IS_NOWHERE
175 #define CONFIG_ENV_SIZE (128 * 1024)
177 #define CONFIG_ENV_IS_IN_NAND
178 #define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN
179 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
183 #define CONFIG_NAND_SC8810
184 #define CONFIG_SPRD_NAND_REGS_BASE (0x60000000)
185 #define CONFIG_SYS_MAX_NAND_DEVICE 1
186 #define CONFIG_SYS_NAND_BASE (0x60000000)
187 //#define CONFIG_JFFS2_NAND
188 //#define CONFIG_SPRD_NAND_HWECC
189 #define CONFIG_SYS_NAND_HW_ECC
190 #define CONFIG_SYS_NAND_LARGEPAGE
191 //#define CONFIG_SYS_NAND_5_ADDR_CYCLE
193 #define CONFIG_SYS_64BIT_VSPRINTF
195 #define CONFIG_CMD_MTDPARTS
196 #define CONFIG_MTD_PARTITIONS
197 #define CONFIG_MTD_DEVICE
198 #define CONFIG_CMD_UBI
199 #define CONFIG_RBTREE
201 /* U-Boot general configuration */
202 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
203 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
204 /* Print buffer sz */
205 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
206 sizeof(CONFIG_SYS_PROMPT) + 16)
207 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
208 /* Boot Argument Buffer Size */
209 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
210 #define CONFIG_CMDLINE_EDITING
211 #define CONFIG_SYS_LONGHELP
213 /* support OS choose */
214 #undef CONFIG_BOOTM_NETBSD
215 #undef CONFIG_BOOTM_RTEMS
217 /* U-Boot commands */
218 #include <config_cmd_default.h>
219 #define CONFIG_CMD_NAND
220 #undef CONFIG_CMD_FPGA
221 #undef CONFIG_CMD_LOADS
222 #undef CONFIG_CMD_NET
223 #undef CONFIG_CMD_NFS
224 #undef CONFIG_CMD_SETGETDCR
226 #define CONFIG_ENV_OVERWRITE
228 #ifdef SPRD_EVM_TAG_ON
229 #define CONFIG_BOOTDELAY 0
231 #define CONFIG_BOOTDELAY 0
232 #define CONFIG_ZERO_BOOTDELAY_CHECK
235 #define CONFIG_LOADADDR (CONFIG_SYS_TEXT_BASE - CONFIG_SYS_MALLOC_LEN - 4*1024*1024) /* loadaddr env var */
236 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
238 #define xstr(s) str(s)
241 #define MTDIDS_DEFAULT "nand0=sprd-nand"
243 #define MTDPARTS_DEFAULT "mtdparts=sprd-nand:256k(spl),512k(2ndbl),256k(params),512k(vmjaluna),10m(modem),3840k(fixnv),3840k(backupfixnv),5120k(dsp),3840k(runtimenv),10m(boot),10m(recovery),230m(system),190m(userdata),20m(cache),256k(misc),1m(boot_logo),1m(fastboot_logo),3840k(productinfo),512k(kpanic),15m(firmware)"
245 /*in sp8810, no enouth uart resource, uart1 will be occupied by ap-cp, so kenrel has to disable console */
246 #define CONFIG_BOOTARGS "mem=256M init=/init "MTDPARTS_DEFAULT
247 //for uart console debug only #define CONFIG_BOOTARGS "mem=256M console=ttyS1,115200n8 init=/init "MTDPARTS_DEFAULT
250 #define CONFIG_LOOP_PER_JIFFY 3350528
251 //#define COPY_LINUX_KERNEL_SIZE (0x600000)
252 #define LINUX_INITRD_NAME "modem"
254 #define CONFIG_BOOTCOMMAND "cboot normal"
255 #define CONFIG_EXTRA_ENV_SETTINGS ""
257 #ifdef CONFIG_CMD_NET
258 #define CONFIG_IPADDR 192.168.10.2
259 #define CONFIG_SERVERIP 192.168.10.5
260 #define CONFIG_NETMASK 255.255.255.0
261 #define CONFIG_USBNET_DEVADDR 26:03:ee:00:87:9f
262 #define CONFIG_USBNET_HOSTADDR 9a:04:c7:d6:30:d0
264 #define CONFIG_NET_MULTI
265 #define CONFIG_CMD_DNS
266 #define CONFIG_CMD_NFS
267 #define CONFIG_CMD_RARP
268 #define CONFIG_CMD_PING
269 /*#define CONFIG_CMD_SNTP */
272 #define CONFIG_USB_GADGET_SC8800G
273 #define CONFIG_USB_DWC
274 #define CONFIG_USB_GADGET_DUALSPEED
276 //#define CONFIG_USB_ETHER
277 #define CONFIG_CMD_FASTBOOT
278 #define SCRATCH_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100000)
279 #define FB_DOWNLOAD_BUF_SIZE (250*1024*1024)
282 #define CONFIG_CALIBRATION_MODE_NEW
283 #define CONFIG_AP_ADC_CALIBRATION
284 #define CONFIG_MODEM_CALIBERATE
285 //#define CONFIG_MODEM_CALI_UART /* uart calibration only */
286 #define CALIBRATION_CHANNEL 1 // 0 : UART0 1: UART1, 3 uart3
289 #define CONFIG_UPDATE_TFTP
291 #define CONFIG_OF_LIBFDT
292 #define CONFIG_SYS_MAX_FLASH_BANKS 1
293 #define CONFIG_SYS_MAX_FLASH_SECT 128
297 #define CONFIG_SPLASH_SCREEN
298 #define LCD_BPP LCD_COLOR16
299 //#define CONFIG_LCD_HVGA 1
300 #define CONFIG_LCD_WVGA 1
301 //#define CONFIG_LCD_INFO
302 //#define LCD_TEST_PATTERN
303 //#define CONFIG_LCD_LOGO
304 #define CONFIG_SYS_WHITE_ON_BLACK
305 #define CONFIG_LCD_HX8369
306 #define CONFIG_FB_LCDC_CS1
307 #ifdef LCD_TEST_PATTERN
308 #define CONSOLE_COLOR_RED 0xf800
309 #define CONSOLE_COLOR_GREEN 0x07e0
310 #define CONSOLE_COLOR_YELLOW 0x07e0
311 #define CONSOLE_COLOR_BLUE 0x001f
312 #define CONSOLE_COLOR_MAGENTA 0x001f
313 #define CONSOLE_COLOR_CYAN 0x001f
319 #define CONFIG_CMD_MMC
320 #ifdef CONFIG_CMD_MMC
321 #define CONFIG_CMD_FAT 1
322 #define CONFIG_FAT_WRITE 1
324 #define CONFIG_GENERIC_MMC 1
325 #define CONFIG_SDHCI 1
326 #define CONFIG_SDIO_HOST 1
327 //#define CONFIG_SP8810_MMC
328 //#define CONFIG_SYS_MMC_MAX_BLK_COUNT 0x1000
329 #define CONFIG_MMC_SDMA 1
330 #define CONFIG_MV_SDHCI 0
331 #define CONFIG_DOS_PARTITION 1
332 #define CONFIG_EFI_PARTITION 1
333 #define CONFIG_SYS_MMC_NUM 1
334 #define CONFIG_SYS_MMC_BASE {0x20500000}
338 #define CALIBRATE_ENUM_MS 15000
339 #define CALIBRATE_IO_MS 10000
341 #define LOW_BAT_VOL 3500 /*phone battery voltage low than this value will not boot up*/
342 #define LOW_BAT_VOL_CHG 3300 //3.3V charger connect
344 #define PWR_KEY_DETECT_CNT 12 /*this should match the count of boot_pwr_check() function */
345 #define ALARM_LEAD_SET_MS 0 /* time set for alarm boot in advancd */
346 #define USB_PHY_TUNE_VALUE 0x44073e33
348 #endif /* __CONFIG_H */