2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #define CONFIG_SILENT_CONSOLE
25 #define CONFIG_GPIOLIB 1
28 #define U_BOOT_SPRD_VER 1
29 /*#define SPRD_EVM_TAG_ON 1*/
30 #ifdef SPRD_EVM_TAG_ON
31 #define SPRD_EVM_ADDR_START 0x40006000
32 #define SPRD_EVM_TAG(_x) (*(((unsigned long *)SPRD_EVM_ADDR_START)+_x) = *(volatile unsigned long *)0x87003004)
37 /* mcp type FmRn : nand flash is mGb and ddr sdram is nGb */
41 #define CONFIG_YAFFS2 1
43 #define BOOT_PART "boot"
44 //#define BOOT_PART "kernel"
45 #define RECOVERY_PART "recovery"
47 * SPREADTRUM BIGPHONE board - SoC Configuration
49 #define CONFIG_ARM926EJS /* arm926ejs CPU core */
50 #define CONFIG_SC8800G
51 #define CONFIG_OPENPHONE
53 #define CONFIG_LCD_SP6810A
56 #define PLATFORM_SC8800G
57 #define CHIP_VER_8800G2
58 #define CHIP_ENDIAN_LITTLE
59 #define SC8800S_LITTLE_ENDIAN FALSE
60 #define _LITTLE_ENDIAN 1
61 #define EXT_MEM_TYPE_DDR 1
64 #define BB_DRAM_TYPE_256MB_32BIT
65 #define CONFIG_MTD_NAND_SPRD 1
67 #define CONFIG_SYS_HZ 1000
68 #define CONFIG_SPRD_TIMER_CLK 1000 /*32768*/
70 //#define CONFIG_SYS_HUSH_PARSER
72 #ifdef CONFIG_SYS_HUSH_PARSER
73 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
76 /*#define CMDLINE_NEED_CONV */
78 #define WATCHDOG_LOAD_VALUE 0x4000
79 #define CONFIG_SYS_STACK_SIZE 0x400
81 //#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
83 /* NAND BOOT is the only boot method */
84 #define CONFIG_NAND_U_BOOT
85 #define DYNAMIC_CRC_TABLE
86 /* Start copying real U-boot from the second page */
87 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
88 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
89 #ifdef CONFIG_NAND_SPL
90 /* Load U-Boot to this address */
91 #define CONFIG_SYS_NAND_U_BOOT_DST 0x00f00000
92 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
94 #define CONFIG_SYS_SDRAM_BASE 0x00000000
95 #define CONFIG_SYS_INIT_SP_ADDR \
96 (CONFIG_SYS_SDRAM_BASE + 0x4000)
98 #define CONFIG_SYS_NAND_SPARE_SIZE 64
99 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
100 #define CONFIG_SYS_NAND_PAGE_COUNT 64
101 #define CONFIG_SYS_NAND_SIZE (128 * 1024 * 1024)
102 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
105 #define CONFIG_SYS_SDRAM_BASE 0x00000000
106 #define CONFIG_SYS_INIT_SP_ADDR \
107 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
109 #define CONFIG_SKIP_LOWLEVEL_INIT
112 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
113 /* Size of the block protected by one OOB (Spare Area in Samsung terminology) */
114 #define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE
115 /* Number of ECC bytes per OOB - S3C6400 calculates 4 bytes ECC in 1-bit mode */
116 //#define CONFIG_SYS_NAND_ECCBYTES 4
117 #define CONFIG_SYS_NAND_ECCBYTES 16
118 /* Number of ECC-blocks per NAND page */
119 #define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
120 /* Size of a single OOB region */
121 #define CONFIG_SYS_NAND_OOBSIZE 64
122 /* Number of ECC bytes per page */
123 #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
124 /* ECC byte positions */
125 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47, \
126 48, 49, 50, 51, 52, 53, 54, 55, \
127 56, 57, 58, 59, 60, 61, 62, 63}
129 #define CONFIG_HW_WATCHDOG
131 #define CONFIG_DISPLAY_CPUINFO
133 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
134 #define CONFIG_SETUP_MEMORY_TAGS 1
135 #define CONFIG_INITRD_TAG 1
141 #define CONFIG_SYS_MALLOC_LEN (2 << 20) /* 1 MiB */
143 * Board has 2 32MB banks of DRAM but there is a bug when using
144 * both so only the first is configured
146 #define CONFIG_NR_DRAM_BANKS 1
148 #define PHYS_SDRAM_1 0x00000000
149 #define PHYS_SDRAM_1_SIZE 0x10000000
150 #if (CONFIG_NR_DRAM_BANKS == 2)
151 #define PHYS_SDRAM_2 0x90000000
152 #define PHYS_SDRAM_2_SIZE 0x02000000
155 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
156 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1+0x0800000)
157 #define CONFIG_STACKSIZE (256 * 1024) /* regular stack */
162 #define CONFIG_SPRD_UART 1
163 #define CONFIG_SYS_SC8800X_UART1 1
164 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */
165 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
166 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
169 * Flash & Environment
171 /* No NOR flash present */
172 #define CONFIG_SYS_MONITOR_LEN ((CONFIG_SYS_NAND_U_BOOT_OFFS)+(CONFIG_SYS_NAND_U_BOOT_SIZE))
173 #define CONFIG_SYS_NO_FLASH 1
174 #define CONFIG_ENV_IS_NOWHERE
175 #define CONFIG_ENV_SIZE (128 * 1024)
177 #define CONFIG_ENV_IS_IN_NAND
178 #define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN
179 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
183 #define CONFIG_NAND_SPRD
184 #define CONFIG_SPRD_NAND_REGS_BASE (0x60000000)
185 #define CONFIG_SYS_MAX_NAND_DEVICE 1
186 #define CONFIG_SYS_NAND_BASE (0x60000000)
187 //#define CONFIG_JFFS2_NAND
188 #define CONFIG_SPRD_NAND_HWECC
189 #define CONFIG_SYS_NAND_LARGEPAGE
191 #define CONFIG_SYS_64BIT_VSPRINTF
193 #define CONFIG_CMD_MTDPARTS
194 #define CONFIG_MTD_PARTITIONS
195 #define CONFIG_MTD_DEVICE
196 #define CONFIG_CMD_UBI
197 #define CONFIG_RBTREE
199 /* U-Boot general configuration */
200 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
201 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
202 /* Print buffer sz */
203 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
204 sizeof(CONFIG_SYS_PROMPT) + 16)
205 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
206 /* Boot Argument Buffer Size */
207 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
208 #define CONFIG_CMDLINE_EDITING
209 #define CONFIG_SYS_LONGHELP
211 /* support OS choose */
212 #undef CONFIG_BOOTM_NETBSD
213 #undef CONFIG_BOOTM_RTEMS
215 /* U-Boot commands */
216 #include <config_cmd_default.h>
217 #define CONFIG_CMD_NAND
218 #undef CONFIG_CMD_FPGA
219 #undef CONFIG_CMD_LOADS
220 #undef CONFIG_CMD_NET
221 #undef CONFIG_CMD_NFS
222 #undef CONFIG_CMD_SETGETDCR
224 #define CONFIG_ENV_OVERWRITE
226 #ifdef SPRD_EVM_TAG_ON
227 #define CONFIG_BOOTDELAY 0
229 #define CONFIG_BOOTDELAY 0
230 #define CONFIG_ZERO_BOOTDELAY_CHECK
233 #define CONFIG_LOADADDR 0x01000000 /* loadaddr env var */
234 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
236 #define xstr(s) str(s)
239 #define MTDIDS_DEFAULT "nand0=sprd-nand"
240 #ifdef CONFIG_G2PHONE
241 #define MTDPARTS_DEFAULT "mtdparts=sprd-nand:384k@256k(boot),256k(params),6m(kernel),6m(ramdisk),6m(recovery),70m(system),30m(userdata),7m(cache)"
242 #define CONFIG_BOOTARGS "mem=64M console=ttyS1,115200n8 init=/init "MTDPARTS_DEFAULT
243 #elif defined CONFIG_OPENPHONE
245 #define MTDPARTS_DEFAULT "mtdparts=sprd-nand:256k(spl),512k(2ndbl),128k(params),512k(vmjaluna),10m(modem),3840k(fixnv),3840k(backupfixnv),5120k(dsp),3840k(runtimenv),10m(boot),10m(recovery),150m(system),280m(userdata),20m(cache),256k(misc),1m(boot_logo),1m(fastboot_logo),2m(productinfo),512k(kpanic)"
247 #error "no MCP defined"
249 #define CONFIG_BOOTARGS "mem=240M console=ttyS1,115200n8 init=/init " MTDPARTS_DEFAULT
251 /* used blocks are 4019 and remaining block are 4096 - 4019 */
253 #define CONFIG_BOOTCOMMAND "cboot normal"
254 #define CONFIG_EXTRA_ENV_SETTINGS ""
256 #ifdef CONFIG_CMD_NET
257 #define CONFIG_IPADDR 192.168.10.2
258 #define CONFIG_SERVERIP 192.168.10.5
259 #define CONFIG_NETMASK 255.255.255.0
260 #define CONFIG_USBNET_DEVADDR 26:03:ee:00:87:9f
261 #define CONFIG_USBNET_HOSTADDR 9a:04:c7:d6:30:d0
264 #define CONFIG_NET_MULTI
265 #define CONFIG_CMD_DNS
266 #define CONFIG_CMD_NFS
267 #define CONFIG_CMD_RARP
268 #define CONFIG_CMD_PING
269 /*#define CONFIG_CMD_SNTP */
272 #define CONFIG_USB_GADGET_SC8800G
273 #define CONFIG_USB_DWC
274 #define CONFIG_USB_GADGET_DUALSPEED
275 //#define CONFIG_USB_ETHER
276 #define CONFIG_CMD_FASTBOOT
277 #define SCRATCH_ADDR 0x1000000
278 #define FB_DOWNLOAD_BUF_SIZE (150*1024*1024)
280 #define CONFIG_MODEM_CALIBERATE
282 #define CONFIG_UPDATE_TFTP
284 #define CONFIG_OF_LIBFDT
285 #define CONFIG_SYS_MAX_FLASH_BANKS 1
286 #define CONFIG_SYS_MAX_FLASH_SECT 128
290 #define CONFIG_SPLASH_SCREEN
291 #define LCD_BPP LCD_COLOR16
292 //#define CONFIG_LCD_INFO
293 //#define LCD_TEST_PATTERN
294 //#define CONFIG_LCD_LOGO
295 #define CONFIG_SYS_WHITE_ON_BLACK
296 #ifdef LCD_TEST_PATTERN
297 #define CONSOLE_COLOR_RED 0xf800
298 #define CONSOLE_COLOR_GREEN 0x07e0
299 #define CONSOLE_COLOR_YELLOW 0x07e0
300 #define CONSOLE_COLOR_BLUE 0x001f
301 #define CONSOLE_COLOR_MAGENTA 0x001f
302 #define CONSOLE_COLOR_CYAN 0x001f
306 #define CALIBRATE_ENUM_MS 15000
307 #define CALIBRATE_IO_MS 10000
309 #define LOW_BAT_VOL 3500 /*phone battery voltage low than this value will not boot up*/
310 #define LOW_BAT_VOL_CHG 3300 //3.3V charger connect
312 #define PWR_KEY_DETECT_CNT 12 /*this should match the count of boot_pwr_check() function */
313 #define ALARM_LEAD_SET_MS 0 /* time set for alarm boot in advancd */
314 #define USB_PHY_TUNE_VALUE 0x44073e33
317 #endif /* __CONFIG_H */