2 * (C) Copyright 2009 DENX Software Engineering
3 * Author: John Rigby <jrigby@gmail.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #define CONFIG_SILENT_CONSOLE
25 #define CONFIG_GPIOLIB 1
28 #define U_BOOT_SPRD_VER 1
29 /*#define SPRD_EVM_TAG_ON 1*/
30 #ifdef SPRD_EVM_TAG_ON
31 #define SPRD_EVM_ADDR_START 0x40006000
32 #define SPRD_EVM_TAG(_x) (*(((unsigned long *)SPRD_EVM_ADDR_START)+_x) = *(volatile unsigned long *)0x87003004)
37 /* mcp type FmRn : nand flash is mGb and ddr sdram is nGb */
41 #define CONFIG_YAFFS2 1
43 #define BOOT_PART "boot"
44 //#define BOOT_PART "kernel"
45 #define RECOVERY_PART "recovery"
47 * SPREADTRUM BIGPHONE board - SoC Configuration
49 #define CONFIG_ARM926EJS /* arm926ejs CPU core */
50 #define CONFIG_SC8800G
51 #define CONFIG_OPENPHONE
53 #define CONFIG_LCD_SP6810A
57 #define PLATFORM_SC8800G
58 #define CHIP_VER_8800G2
59 #define CHIP_ENDIAN_LITTLE
60 #define SC8800S_LITTLE_ENDIAN FALSE
61 #define _LITTLE_ENDIAN 1
62 #define EXT_MEM_TYPE_DDR 1
65 #define BB_DRAM_TYPE_256MB_32BIT
66 #define CONFIG_MTD_NAND_SPRD 1
68 #define CONFIG_SYS_HZ 1000
69 #define CONFIG_SPRD_TIMER_CLK 1000 /*32768*/
71 //#define CONFIG_SYS_HUSH_PARSER
73 #ifdef CONFIG_SYS_HUSH_PARSER
74 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
77 /*#define CMDLINE_NEED_CONV */
79 #define WATCHDOG_LOAD_VALUE 0x4000
80 #define CONFIG_SYS_STACK_SIZE 0x400
82 //#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */
84 /* NAND BOOT is the only boot method */
85 #define CONFIG_NAND_U_BOOT
86 #define DYNAMIC_CRC_TABLE
87 /* Start copying real U-boot from the second page */
88 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
89 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
90 #ifdef CONFIG_NAND_SPL
91 /* Load U-Boot to this address */
92 #define CONFIG_SYS_NAND_U_BOOT_DST 0x00f00000
93 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
95 #define CONFIG_SYS_SDRAM_BASE 0x00000000
96 #define CONFIG_SYS_INIT_SP_ADDR \
97 (CONFIG_SYS_SDRAM_BASE + 0x4000)
99 #define CONFIG_SYS_NAND_SPARE_SIZE 64
100 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
101 #define CONFIG_SYS_NAND_PAGE_COUNT 64
102 #define CONFIG_SYS_NAND_SIZE (128 * 1024 * 1024)
103 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
106 #define CONFIG_SYS_SDRAM_BASE 0x00000000
107 #define CONFIG_SYS_INIT_SP_ADDR \
108 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
110 #define CONFIG_SKIP_LOWLEVEL_INIT
113 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
114 /* Size of the block protected by one OOB (Spare Area in Samsung terminology) */
115 #define CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_PAGE_SIZE
116 /* Number of ECC bytes per OOB - S3C6400 calculates 4 bytes ECC in 1-bit mode */
117 //#define CONFIG_SYS_NAND_ECCBYTES 4
118 #define CONFIG_SYS_NAND_ECCBYTES 16
119 /* Number of ECC-blocks per NAND page */
120 #define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
121 /* Size of a single OOB region */
122 #define CONFIG_SYS_NAND_OOBSIZE 64
123 /* Number of ECC bytes per page */
124 #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
125 /* ECC byte positions */
126 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47, \
127 48, 49, 50, 51, 52, 53, 54, 55, \
128 56, 57, 58, 59, 60, 61, 62, 63}
130 #define CONFIG_HW_WATCHDOG
132 #define CONFIG_DISPLAY_CPUINFO
134 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
135 #define CONFIG_SETUP_MEMORY_TAGS 1
136 #define CONFIG_INITRD_TAG 1
142 #define CONFIG_SYS_MALLOC_LEN (2 << 20) /* 1 MiB */
144 * Board has 2 32MB banks of DRAM but there is a bug when using
145 * both so only the first is configured
147 #define CONFIG_NR_DRAM_BANKS 1
149 #define PHYS_SDRAM_1 0x00000000
150 #define PHYS_SDRAM_1_SIZE 0x10000000
151 #if (CONFIG_NR_DRAM_BANKS == 2)
152 #define PHYS_SDRAM_2 0x90000000
153 #define PHYS_SDRAM_2_SIZE 0x02000000
156 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
157 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1+0x0800000)
158 #define CONFIG_STACKSIZE (256 * 1024) /* regular stack */
163 #define CONFIG_SPRD_UART 1
164 #define CONFIG_SYS_SC8800X_UART1 1
165 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */
166 #define CONFIG_BAUDRATE 115200 /* Default baud rate */
167 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
170 * Flash & Environment
172 /* No NOR flash present */
173 #define CONFIG_SYS_MONITOR_LEN ((CONFIG_SYS_NAND_U_BOOT_OFFS)+(CONFIG_SYS_NAND_U_BOOT_SIZE))
174 #define CONFIG_SYS_NO_FLASH 1
175 #define CONFIG_ENV_IS_NOWHERE
176 #define CONFIG_ENV_SIZE (128 * 1024)
178 #define CONFIG_ENV_IS_IN_NAND
179 #define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN
180 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
184 #define CONFIG_NAND_SPRD
185 #define CONFIG_SPRD_NAND_REGS_BASE (0x60000000)
186 #define CONFIG_SYS_MAX_NAND_DEVICE 1
187 #define CONFIG_SYS_NAND_BASE (0x60000000)
188 //#define CONFIG_JFFS2_NAND
189 #define CONFIG_SPRD_NAND_HWECC
190 #define CONFIG_SYS_NAND_LARGEPAGE
192 #define CONFIG_SYS_64BIT_VSPRINTF
194 #define CONFIG_CMD_MTDPARTS
195 #define CONFIG_MTD_PARTITIONS
196 #define CONFIG_MTD_DEVICE
197 #define CONFIG_CMD_UBI
198 #define CONFIG_RBTREE
200 /* U-Boot general configuration */
201 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
202 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
203 /* Print buffer sz */
204 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
205 sizeof(CONFIG_SYS_PROMPT) + 16)
206 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
207 /* Boot Argument Buffer Size */
208 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
209 #define CONFIG_CMDLINE_EDITING
210 #define CONFIG_SYS_LONGHELP
212 /* support OS choose */
213 #undef CONFIG_BOOTM_NETBSD
214 #undef CONFIG_BOOTM_RTEMS
216 /* U-Boot commands */
217 #include <config_cmd_default.h>
218 #define CONFIG_CMD_NAND
219 #undef CONFIG_CMD_FPGA
220 #undef CONFIG_CMD_LOADS
221 #undef CONFIG_CMD_NET
222 #undef CONFIG_CMD_NFS
223 #undef CONFIG_CMD_SETGETDCR
225 #define CONFIG_ENV_OVERWRITE
227 #ifdef SPRD_EVM_TAG_ON
228 #define CONFIG_BOOTDELAY 0
230 #define CONFIG_BOOTDELAY 0
231 #define CONFIG_ZERO_BOOTDELAY_CHECK
234 #define CONFIG_LOADADDR 0x01000000 /* loadaddr env var */
235 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
237 #define xstr(s) str(s)
240 #define MTDIDS_DEFAULT "nand0=sprd-nand"
241 #ifdef CONFIG_G2PHONE
242 #define MTDPARTS_DEFAULT "mtdparts=sprd-nand:384k@256k(boot),256k(params),6m(kernel),6m(ramdisk),6m(recovery),70m(system),30m(userdata),7m(cache)"
243 #define CONFIG_BOOTARGS "mem=64M console=ttyS1,115200n8 init=/init "MTDPARTS_DEFAULT
244 #elif defined CONFIG_OPENPHONE
246 #define MTDPARTS_DEFAULT "mtdparts=sprd-nand:256k(spl),512k(2ndbl),128k(params),512k(vmjaluna),4m(modem),3840k(fixnv),3840k(backupfixnv),5120k(dsp),3840k(runtimenv),7m(boot),7m(recovery),100m(system),101m(userdata),14m(cache),256k(misc),1m(boot_logo),1m(fastboot_logo),2m(productinfo),512k(kpanic)"
248 #error "no MCP defined"
250 #define CONFIG_BOOTARGS "mem=240M console=ttyS1,115200n8 init=/init " MTDPARTS_DEFAULT
252 /* used blocks are 2043 and remaining block are 2048 - 2043 */
254 #define CONFIG_BOOTCOMMAND "cboot normal"
255 #define CONFIG_EXTRA_ENV_SETTINGS ""
257 #ifdef CONFIG_CMD_NET
258 #define CONFIG_IPADDR 192.168.10.2
259 #define CONFIG_SERVERIP 192.168.10.5
260 #define CONFIG_NETMASK 255.255.255.0
261 #define CONFIG_USBNET_DEVADDR 26:03:ee:00:87:9f
262 #define CONFIG_USBNET_HOSTADDR 9a:04:c7:d6:30:d0
265 #define CONFIG_NET_MULTI
266 #define CONFIG_CMD_DNS
267 #define CONFIG_CMD_NFS
268 #define CONFIG_CMD_RARP
269 #define CONFIG_CMD_PING
270 /*#define CONFIG_CMD_SNTP */
273 #define CONFIG_USB_GADGET_SC8800G
274 #define CONFIG_USB_DWC
275 #define CONFIG_USB_GADGET_DUALSPEED
276 //#define CONFIG_USB_ETHER
277 #define CONFIG_CMD_FASTBOOT
278 #define SCRATCH_ADDR 0x1000000
279 #define FB_DOWNLOAD_BUF_SIZE (112*1024*1024)
281 #define CONFIG_MODEM_CALIBERATE
283 #define CONFIG_UPDATE_TFTP
285 #define CONFIG_OF_LIBFDT
286 #define CONFIG_SYS_MAX_FLASH_BANKS 1
287 #define CONFIG_SYS_MAX_FLASH_SECT 128
291 #define CONFIG_SPLASH_SCREEN
292 #define LCD_BPP LCD_COLOR16
293 //#define CONFIG_LCD_INFO
294 //#define LCD_TEST_PATTERN
295 //#define CONFIG_LCD_LOGO
296 #define CONFIG_SYS_WHITE_ON_BLACK
297 #ifdef LCD_TEST_PATTERN
298 #define CONSOLE_COLOR_RED 0xf800
299 #define CONSOLE_COLOR_GREEN 0x07e0
300 #define CONSOLE_COLOR_YELLOW 0x07e0
301 #define CONSOLE_COLOR_BLUE 0x001f
302 #define CONSOLE_COLOR_MAGENTA 0x001f
303 #define CONSOLE_COLOR_CYAN 0x001f
307 #define CALIBRATE_ENUM_MS 15000
308 #define CALIBRATE_IO_MS 10000
310 #define LOW_BAT_VOL 3500 /*phone battery voltage low than this value will not boot up*/
311 #define LOW_BAT_VOL_CHG 3300 //3.3V charger connect
313 #define PWR_KEY_DETECT_CNT 12 /*this should match the count of boot_pwr_check() function */
314 #define ALARM_LEAD_SET_MS 0 /* time set for alarm boot in advancd */
315 #define USB_PHY_TUNE_VALUE 0x44073e33
318 #endif /* __CONFIG_H */