Merge tag 'xilinx-for-v2022.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u...
[platform/kernel/u-boot.git] / include / configs / somlabs_visionsom_6ull.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2017-2019 A. Karas, SomLabs
4  * Copyright (C) 2015-2016 Freescale Semiconductor, Inc.
5  *
6  * Configuration settings for the SoMlabs VisionSOM 6ULL board.
7  */
8 #ifndef __SOMLABS_VISIONSOM_6ULL_H
9 #define __SOMLABS_VISIONSOM_6ULL_H
10
11 #include <asm/arch/imx-regs.h>
12 #include <linux/sizes.h>
13 #include "mx6_common.h"
14 #include <asm/mach-imx/gpio.h>
15
16 /* SPL options */
17 #include "imx6_spl.h"
18
19 #define CONFIG_MXC_UART_BASE            UART1_BASE
20
21 /* MMC Configs */
22 #ifdef CONFIG_FSL_USDHC
23 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC2_BASE_ADDR
24
25 #define CONFIG_SYS_FSL_USDHC_NUM        1
26 #endif /* CONFIG_FSL_USDHC */
27
28 #define CONFIG_EXTRA_ENV_SETTINGS \
29         "bootm_size=0x10000000\0" \
30         "console=ttymxc0\0" \
31         "initrd_addr=0x86800000\0" \
32         "fdt_addr=0x83000000\0" \
33         "script=boot.scr\0" \
34         "image=zImage\0" \
35         "splashimage=0x80000000\0" \
36         "splashfile=/boot/splash.bmp\0" \
37         "mmcdev=1\0" \
38         "mmcpart=1\0" \
39         "mmcroot=/dev/mmcblk1p1 rootwait rw\0" \
40         "setrootmmc=setenv rootspec root=${mmcroot}\0" \
41         "setbootscriptmmc=setenv loadbootscript " \
42                 "load mmc ${mmcdev}:${mmcpart} " \
43                 "${loadaddr} /boot/${script};\0" \
44         "setloadmmc=setenv loadimage load mmc ${mmcdev}:${mmcpart} " \
45                 "${loadaddr} /boot/${image}; " \
46                 "setenv loadfdt load mmc ${mmcdev}:${mmcpart} " \
47                 "${fdt_addr} /boot/${fdt_file};\0" \
48         "setbootargs=setenv bootargs console=${console},${baudrate} " \
49                 "${rootspec}\0" \
50         "execbootscript=echo Running bootscript...; source\0" \
51         "setfdtfile=setenv fdt_file somlabs-visionsom-6ull.dtb\0" \
52         "checkbootdev=run setbootscriptmmc; " \
53                 "run setrootmmc; " \
54                 "run setloadmmc; " \
55
56 /* Miscellaneous configurable options */
57
58 /* Physical Memory Map */
59 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
60
61 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
62 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
63 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
64
65 #define CONFIG_SYS_INIT_SP_OFFSET \
66         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
67 #define CONFIG_SYS_INIT_SP_ADDR \
68         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
69
70 /* environment organization */
71
72 /* USB Configs */
73 #ifdef CONFIG_CMD_USB
74 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
75 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
76 #define CONFIG_MXC_USB_FLAGS   0
77 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
78 #endif
79
80 #ifdef CONFIG_CMD_NET
81 #define IMX_FEC_BASE                    ENET_BASE_ADDR
82 #define CONFIG_FEC_MXC_PHYADDR          0x1
83 #define CONFIG_FEC_XCV_TYPE             RMII
84 #define CONFIG_ETHPRIME                 "eth0"
85 #endif
86
87 #endif