Convert CONFIG_L2_CACHE to Kconfig
[platform/kernel/u-boot.git] / include / configs / socrates.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2008
4  * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
5  *
6  * Wolfgang Denk <wd@denx.de>
7  * Copyright 2004 Freescale Semiconductor.
8  * (C) Copyright 2002,2003 Motorola,Inc.
9  * Xianghua Xiao <X.Xiao@motorola.com>
10  */
11
12 /*
13  * Socrates
14  */
15
16 #ifndef __CONFIG_H
17 #define __CONFIG_H
18
19 /*
20  * Only possible on E500 Version 2 or newer cores.
21  */
22
23 /*
24  * sysclk for MPC85xx
25  *
26  * Two valid values are:
27  *    33000000
28  *    66000000
29  *
30  * Most PCI cards are still 33Mhz, so in the presence of PCI, 33MHz
31  * is likely the desired value here, so that is now the default.
32  * The board, however, can run at 66MHz.  In any event, this value
33  * must match the settings of some switches.  Details can be found
34  * in the README.mpc85xxads.
35  */
36
37 #define CFG_SYS_INIT_DBCR DBCR_IDM              /* Enable Debug Exceptions      */
38
39 #undef  CFG_SYS_DRAM_TEST                       /* memory test, takes time      */
40
41 #define CFG_SYS_CCSRBAR         0xE0000000
42 #define CFG_SYS_CCSRBAR_PHYS_LOW        CFG_SYS_CCSRBAR
43
44 /* DDR Setup */
45
46 #define CONFIG_MEM_INIT_VALUE   0xDeadBeef
47
48 #define CFG_SYS_DDR_SDRAM_BASE  0x00000000
49 #define CFG_SYS_SDRAM_BASE              CFG_SYS_DDR_SDRAM_BASE
50
51 /* I2C addresses of SPD EEPROMs */
52 #define SPD_EEPROM_ADDRESS      0x50    /* CTLR 0 DIMM 0 */
53
54
55 /* Hardcoded values, to use instead of SPD */
56 #define CFG_SYS_DDR_CS0_BNDS            0x0000000f
57 #define CFG_SYS_DDR_CS0_CONFIG          0x80010102
58 #define CFG_SYS_DDR_TIMING_0            0x00260802
59 #define CFG_SYS_DDR_TIMING_1            0x3935D322
60 #define CFG_SYS_DDR_TIMING_2            0x14904CC8
61 #define CFG_SYS_DDR_MODE                        0x00480432
62 #define CFG_SYS_DDR_INTERVAL            0x030C0100
63 #define CFG_SYS_DDR_CONFIG_2            0x04400000
64 #define CFG_SYS_DDR_CONFIG                      0xC3008000
65 #define CFG_SYS_DDR_CLK_CONTROL         0x03800000
66 #define CFG_SYS_SDRAM_SIZE                      256 /* in Megs */
67
68 /*
69  * Flash on the LocalBus
70  */
71 #define CFG_SYS_FLASH0          0xFE000000
72 #define CFG_SYS_FLASH1          0xFC000000
73 #define CFG_SYS_FLASH_BANKS_LIST        { CFG_SYS_FLASH1, CFG_SYS_FLASH0 }
74
75 #define CFG_SYS_LBC_FLASH_BASE  CFG_SYS_FLASH1  /* Localbus flash start */
76 #define CFG_SYS_FLASH_BASE              CFG_SYS_LBC_FLASH_BASE /* start of FLASH        */
77
78 #define CFG_SYS_LBC_LCRR                0x00030004    /* LB clock ratio reg     */
79 #define CFG_SYS_LBC_LBCR                0x00000000    /* LB config reg          */
80 #define CFG_SYS_LBC_LSRT                0x20000000    /* LB sdram refresh timer */
81 #define CFG_SYS_LBC_MRTPR               0x20000000    /* LB refresh timer presc.*/
82
83 #define CFG_SYS_INIT_RAM_ADDR   0xe4010000      /* Initial RAM address  */
84 #define CFG_SYS_INIT_RAM_SIZE   0x4000          /* Size used area in RAM*/
85
86 #define CFG_SYS_INIT_SP_OFFSET  (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
87
88 /* FPGA and NAND */
89 #define CFG_SYS_FPGA_BASE               0xc0000000
90 #define CFG_SYS_FPGA_SIZE               0x00100000      /* 1 MB         */
91
92 #define CFG_SYS_NAND_BASE               (CFG_SYS_FPGA_BASE + 0x70)
93
94 /* LIME GDC */
95 #define CFG_SYS_LIME_BASE               0xc8000000
96
97 /*
98  * General PCI
99  * Memory space is mapped 1-1.
100  */
101
102 #define CFG_SYS_PCI1_MEM_PHYS   0x80000000
103 #define CFG_SYS_PCI1_IO_PHYS    0xE2000000
104
105 /*
106  * Miscellaneous configurable options
107  */
108
109 /*
110  * For booting Linux, the board info and command line data
111  * have to be in the first 8 MB of memory, since this is
112  * the maximum mapped by the Linux kernel during initialization.
113  */
114 #define CFG_SYS_BOOTMAPSZ       (8 << 20)       /* Initial Memory map for Linux */
115
116
117 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
118         "netdev=eth0\0"                                                 \
119         "consdev=ttyS0\0"                                               \
120         "uboot_file=/home/tftp/syscon3/u-boot.bin\0"                    \
121         "bootfile=/home/tftp/syscon3/uImage\0"                          \
122         "fdt_file=/home/tftp/syscon3/socrates.dtb\0"                    \
123         "initrd_file=/home/tftp/syscon3/uinitrd.gz\0"                   \
124         "uboot_addr=FFF60000\0"                                         \
125         "kernel_addr=FE000000\0"                                        \
126         "fdt_addr=FE1E0000\0"                                           \
127         "ramdisk_addr=FE200000\0"                                       \
128         "fdt_addr_r=B00000\0"                                           \
129         "kernel_addr_r=200000\0"                                        \
130         "ramdisk_addr_r=400000\0"                                       \
131         "rootpath=/opt/eldk/ppc_85xxDP\0"                               \
132         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
133         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
134                 "nfsroot=$serverip:$rootpath\0"                         \
135         "addcons=setenv bootargs $bootargs "                            \
136                 "console=$consdev,$baudrate\0"                          \
137         "addip=setenv bootargs $bootargs "                              \
138                 "ip=$ipaddr:$serverip:$gatewayip:$netmask"              \
139                 ":$hostname:$netdev:off panic=1\0"                      \
140         "boot_nor=run ramargs addcons;"                                 \
141                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"    \
142         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
143                 "tftp ${fdt_addr_r} ${fdt_file}; "                      \
144                 "run nfsargs addip addcons;"                            \
145                 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0"              \
146         "update_uboot=tftp 100000 ${uboot_file};"                       \
147                 "protect off fff60000 ffffffff;"                        \
148                 "era fff60000 ffffffff;"                                \
149                 "cp.b 100000 fff60000 ${filesize};"                     \
150                 "setenv filesize;saveenv\0"                             \
151         "update_kernel=tftp 100000 ${bootfile};"                        \
152                 "era fe000000 fe1dffff;"                                \
153                 "cp.b 100000 fe000000 ${filesize};"                     \
154                 "setenv filesize;saveenv\0"                             \
155         "update_fdt=tftp 100000 ${fdt_file};"                           \
156                 "era fe1e0000 fe1fffff;"                                \
157                 "cp.b 100000 fe1e0000 ${filesize};"                     \
158                 "setenv filesize;saveenv\0"                             \
159         "update_initrd=tftp 100000 ${initrd_file};"                     \
160                 "era fe200000 fe9fffff;"                                \
161                 "cp.b 100000 fe200000 ${filesize};"                     \
162                 "setenv filesize;saveenv\0"                             \
163         "clean_data=era fea00000 fff5ffff\0"                            \
164         "usbargs=setenv bootargs root=/dev/sda1 rw\0"                   \
165         "load_usb=usb start;"                                           \
166                 "ext2load usb 0:1 ${kernel_addr_r} /boot/uImage\0"      \
167         "boot_usb=run load_usb usbargs addcons;"                        \
168                 "bootm ${kernel_addr_r} - ${fdt_addr};"                 \
169                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"    \
170         ""
171
172 /* pass open firmware flat tree */
173
174 #endif  /* __CONFIG_H */