1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015-2019 Marek Vasut <marex@denx.de>
5 #ifndef __CONFIG_SOFTING_VINING_FPGA_H__
6 #define __CONFIG_SOFTING_VINING_FPGA_H__
8 #include <asm/arch/base_addr_ac5.h>
10 /* Memory configurations */
11 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */
14 #define CONFIG_BOOTFILE "fitImage"
15 #define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MiB */
17 /* Extra Environment */
18 #define CONFIG_HOSTNAME "socfpga_vining_fpga"
21 * Active LOW GPIO buttons:
22 * A: GPIO 77 ... the button between USB B and ethernet
23 * B: GPIO 78 ... the button between USB A ports
26 * if button B is pressed, boot recovery system after 10 seconds
27 * if force_boottype is set, boot system depending on the value in the
28 * $force_boottype variable after 1 second
29 * if button B is not pressed and force_boottype is not set, boot normal
30 * Linux system after 5 seconds
33 #define CONFIG_EXTRA_ENV_SETTINGS \
37 "bootscript=boot.scr\0" \
40 "ubipart=ubi0:vining-fpga-rootfs\0" \
41 "ubisfcs=1\0" /* Default is flash at CS#1 */ \
43 "hostname=vining_fpga\0" \
44 "kernel_addr_r=0x10000000\0" \
45 "fdt_addr_r=0x20000000\0" \
46 "fdt_high=0xffffffff\0" \
47 "initrd_high=0xffffffff\0" \
48 "dfu_alt_info=qspi0 sf 0:0;qspi1 sf 0:1\0" \
49 "mtdparts_0_16m=ff705000.spi.0:" /* 16MiB+128MiB SF config */ \
55 "-(rcvrfs)\0" /* Recovery */ \
56 "mtdparts_0_256m=ff705000.spi.0:" /* 256MiB(+256MiB) config */ \
62 "14720k(rcvrfs)," /* Recovery */ \
63 "64m(rootfs)," /* Root */ \
64 "-(userfs)\0" /* User */ \
65 "mtdparts_1_128m=ff705000.spi.1:" /* 16MiB+128MiB SF config */ \
68 "mtdparts_1_256m=ff705000.spi.1:" /* 256MiB+256MiB SF config */ \
70 "update_filename=u-boot-with-spl-dtb.sfp\0" \
71 "update_qspi_offset=0x0\0" \
72 "update_qspi=" /* Update the QSPI firmware */ \
73 "if sf probe ; then " \
74 "if tftp ${update_filename} ; then " \
75 "sf update ${loadaddr} ${update_qspi_offset} ${filesize} ; " \
79 "setenv sf_size_0 ; setenv sf_size_1 ; " \
80 "sf probe 0:0 && setenv sf_size_0 ${sf_size} ; " \
81 "sf probe 0:1 && setenv sf_size_1 ${sf_size} ; " \
82 "if test -z \"${sf_size_1}\" ; then " \
84 "setenv mtdparts_0 ${mtdparts_0_256m} ; " \
85 "setenv mtdparts_1 ; " \
86 "elif test \"${sf_size_0}\" = \"1000000\" ; then " \
87 /* 16MiB+128MiB SF */ \
88 "setenv mtdparts_0 ${mtdparts_0_16m} ; " \
89 "setenv mtdparts_1 ${mtdparts_1_128m} ; " \
91 /* 256MiB+256MiB SF */ \
92 "setenv mtdparts_0 ${mtdparts_0_256m} ; " \
93 "setenv mtdparts_1 ${mtdparts_1_256m} ; " \
95 "fpga_filename=output_file.rbf\0" \
96 "load_fpga=" /* Load FPGA bitstream */ \
97 "if tftp ${fpga_filename} ; then " \
98 "fpga load 0 $loadaddr $filesize ; " \
102 "setenv bootargs ${bootargs} " \
103 "console=${consdev},${baudrate}\0" \
105 "setenv bootargs ${bootargs} " \
106 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
107 "${netmask}:${hostname}:${netdev}:off\0" \
109 "setenv bootargs ${bootargs} ${miscargs}\0" \
111 "if test -z \"${sf_size_1}\" ; then " \
112 "setenv mtdparts \"${mtdparts_0}\" ; " \
114 "setenv mtdparts \"${mtdparts_0};${mtdparts_1}\" ; " \
116 "setenv bootargs ${bootargs} mtdparts=${mtdparts}\0" \
117 "addargs=run addcons addmtd addmisc\0" \
119 "ubi part ${ubimtd} ; ubifsmount ${ubipart} ; " \
120 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
122 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
123 "miscargs=nohlt panic=1\0" \
125 "setenv bootargs ubi.mtd=${ubimtdnr} " \
126 "root=${ubipart} rootfstype=ubifs\0" \
128 "setenv bootargs root=/dev/nfs rw " \
129 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
131 "if test \"${boottype}\" = \"rcvr\" ; then " \
132 "setenv ubisfcs 0 ; " \
133 "setenv ubimtd rcvrfs ; " \
134 "setenv ubimtdnr 5 ; " \
135 "setenv mtdparts mtdparts=${mtdparts_0} ; " \
136 "setenv mtdids nor0=ff705000.spi.0 ; " \
137 "setenv ubipart ubi0:vining-fpga-rootfs ; " \
139 "if test \"${sf_size_0}\" = \"1000000\" ; then "\
140 /* 16MiB+128MiB SF */ \
141 "setenv ubisfcs 1 ; " \
142 "setenv ubimtd rootfs ; " \
143 "setenv ubimtdnr 6 ; " \
144 "setenv mtdparts mtdparts=${mtdparts_1} ; " \
145 "setenv mtdids nor0=ff705000.spi.1 ; " \
146 "setenv ubipart ubi0:vining-fpga-rootfs ; " \
148 /* 256MiB(+256MiB) SF */ \
149 "setenv ubisfcs 0 ; " \
150 "setenv ubimtd rootfs ; " \
151 "setenv ubimtdnr 6 ; " \
152 "setenv mtdparts mtdparts=${mtdparts_0} ; " \
153 "setenv mtdids nor0=ff705000.spi.0 ; " \
154 "setenv ubipart ubi0:vining-fpga-rootfs ; " \
157 "sf probe 0:${ubisfcs}\0" \
159 "if test -z \"${sf_size_1}\" ; then " /* 1x256MiB SF */ \
160 "imxtract ${kernel_addr_r} fdt@1 ${fdt_addr_r} && " \
161 "fdt addr ${fdt_addr_r} && " \
163 "fdt set /soc/spi@ff705000/n25q00@1 status disabled && " \
164 "bootm ${kernel_addr_r}:kernel@1 - ${fdt_addr_r} ; " \
166 "bootm ${kernel_addr_r} ; " \
169 "run ubi_sfsel ubiload ubiargs addargs boot_kernel\0" \
171 "run ubiload nfsargs addip addargs boot_kernel\0" \
173 "run netload ubiargs addargs boot_kernel\0" \
175 "run netload nfsargs addip addargs boot_kernel\0" \
176 "selboot=" /* Select from where to boot. */ \
177 "run sf_identify ; " \
178 "if test \"${bootmode}\" = \"qspi\" ; then " \
180 "if test \"${boottype}\" = \"rcvr\" ; then " \
181 "echo \"Booting recovery system\" ; " \
182 "led 3 on ; " /* Bottom RED */ \
184 "led 1 on ; " /* Top RED */ \
186 "else echo \"Unsupported boot mode: \"${bootmode} ; " \
188 "socfpga_legacy_reset_compat=1\0"
190 /* Support changing the prompt string */
191 #define CONFIG_CMDLINE_PS_SUPPORT
193 /* The rest of the configuration is shared */
194 #include <configs/socfpga_common.h>
196 #endif /* __CONFIG_SOFTING_VINING_FPGA_H__ */