2 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
4 * SPDX-License-Identifier: GPL-2.0+
6 #ifndef __CONFIG_SAMTEC_VINING_FPGA_H__
7 #define __CONFIG_SAMTEC_VINING_FPGA_H__
9 #include <asm/arch/base_addr_ac5.h>
12 #define CONFIG_SYS_NO_FLASH
13 #define CONFIG_DOS_PARTITION
14 #define CONFIG_FAT_WRITE
15 #define CONFIG_HW_WATCHDOG
17 #define CONFIG_CMD_EEPROM
18 #define CONFIG_CMD_LED
20 /* Memory configurations */
21 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */
24 #define CONFIG_BOOTDELAY 5
25 #define CONFIG_BOOTFILE "openwrt-socfpga-socfpga_cyclone5_vining_fpga-fit-uImage.itb"
26 #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
27 #define CONFIG_BOOTCOMMAND "run selboot"
28 #define CONFIG_LOADADDR 0x01000000
29 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
32 #ifdef CONFIG_CMD_EEPROM
33 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
34 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
35 #define CONFIG_SYS_I2C_EEPROM_BUS 0
36 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
37 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
47 #define CONFIG_STATUS_LED
48 #define CONFIG_GPIO_LED
49 #define CONFIG_BOARD_SPECIFIC_LED
50 #define STATUS_LED_BIT 48
51 #define STATUS_LED_STATE STATUS_LED_OFF
52 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
53 #define STATUS_LED_BIT1 53
54 #define STATUS_LED_STATE1 STATUS_LED_OFF
55 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
56 #define STATUS_LED_BIT2 54
57 #define STATUS_LED_STATE2 STATUS_LED_OFF
58 #define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2)
59 #define STATUS_LED_BIT3 65
60 #define STATUS_LED_STATE3 STATUS_LED_OFF
61 #define STATUS_LED_PERIOD3 (CONFIG_SYS_HZ / 2)
63 /* Ethernet on SoC (EMAC) */
64 #if defined(CONFIG_CMD_NET)
65 #define CONFIG_BOOTP_SEND_HOSTNAME
67 #define CONFIG_PHY_MICREL
68 #define CONFIG_PHY_MICREL_KSZ9021
71 /* Extra Environment */
72 #define CONFIG_HOSTNAME socfpga_vining_fpga
75 * Active LOW GPIO buttons:
76 * A: GPIO 77 ... the button between USB B and ethernet
77 * B: GPIO 78 ... the button between USB A ports
80 * if button B is not pressed, boot normal Linux system immediatelly
81 * if button B is pressed, wait $bootdelay and boot recovery system
83 #define CONFIG_PREBOOT \
84 "setenv hostname vining-${unit_serial} ; " \
85 "setenv PS1 \"${unit_ident} (${unit_serial}) => \" ; " \
86 "if gpio input 78 ; then " \
87 "setenv bootdelay 10 ; " \
88 "setenv boottype rcvr ; " \
90 "setenv bootdelay 5 ; " \
91 "setenv boottype norm ; " \
94 #define CONFIG_EXTRA_ENV_SETTINGS \
98 "bootscript=boot.scr\0" \
101 "ubipart=ubi0:rootfs\0" \
102 "ubisfcs=1\0" /* Default is flash at CS#1 */ \
104 "hostname=vining_fpga\0" \
105 "kernel_addr_r=0x10000000\0" \
106 "mtdparts_0=ff705000.spi.0:" \
112 "-(rcvrfs)\0" /* Recovery */ \
113 "mtdparts_1=ff705000.spi.1:" \
116 "update_filename=u-boot-with-spl-dtb.sfp\0" \
117 "update_qspi_offset=0x0\0" \
118 "update_qspi=" /* Update the QSPI firmware */ \
119 "if sf probe ; then " \
120 "if tftp ${update_filename} ; then " \
121 "sf update ${loadaddr} ${update_qspi_offset} ${filesize} ; " \
124 "fpga_filename=output_file.rbf\0" \
125 "load_fpga=" /* Load FPGA bitstream */ \
126 "if tftp ${fpga_filename} ; then " \
127 "fpga load 0 $loadaddr $filesize ; " \
131 "setenv bootargs ${bootargs} " \
132 "console=${consdev},${baudrate}\0" \
134 "setenv bootargs ${bootargs} " \
135 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
136 "${netmask}:${hostname}:${netdev}:off\0" \
138 "setenv bootargs ${bootargs} ${miscargs}\0" \
140 "setenv mtdparts \"${mtdparts_0};${mtdparts_1}\" ; " \
141 "setenv bootargs ${bootargs} mtdparts=${mtdparts}\0" \
142 "addargs=run addcons addmtd addmisc\0" \
144 "ubi part ${ubimtd} ; ubifsmount ${ubipart} ; " \
145 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
147 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
148 "miscargs=nohlt panic=1\0" \
150 "setenv bootargs ubi.mtd=${ubimtdnr} " \
151 "root=${ubipart} rootfstype=ubifs\0" \
153 "setenv bootargs root=/dev/nfs rw " \
154 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
156 "if test \"${boottype}\" = \"rcvr\" ; then " \
157 "setenv ubisfcs 0 ; " \
158 "setenv ubimtd rcvrfs ; " \
159 "setenv ubimtdnr 5 ; " \
160 "setenv mtdparts mtdparts=${mtdparts_0} ; " \
161 "setenv mtdids nor0=ff705000.spi.0 ; " \
162 "setenv ubipart ubi0:rootfs ; " \
164 "setenv ubisfcs 1 ; " \
165 "setenv ubimtd rootfs ; " \
166 "setenv ubimtdnr 6 ; " \
167 "setenv mtdparts mtdparts=${mtdparts_1} ; " \
168 "setenv mtdids nor0=ff705000.spi.1 ; " \
169 "setenv ubipart ubi0:rootfs ; " \
171 "sf probe 0:${ubisfcs}\0" \
173 "run ubi_sfsel ubiload ubiargs addargs ; " \
174 "bootm ${kernel_addr_r}\0" \
176 "run ubiload nfsargs addip addargs ; " \
177 "bootm ${kernel_addr_r}\0" \
179 "run netload ubiargs addargs ; " \
180 "bootm ${kernel_addr_r}\0" \
182 "run netload nfsargs addip addargs ; " \
183 "bootm ${kernel_addr_r}\0" \
184 "selboot=" /* Select from where to boot. */ \
185 "if test \"${bootmode}\" = \"qspi\" ; then " \
187 "if test \"${boottype}\" = \"rcvr\" ; then " \
188 "echo \"Booting recovery system\" ; " \
189 "led 3 on ; " /* Bottom RED */ \
191 "led 1 on ; " /* Top RED */ \
193 "else echo \"Unsupported boot mode: \"${bootmode} ; " \
196 #define CONFIG_CMD_UBI
197 #define CONFIG_CMD_UBIFS
198 #define CONFIG_MTD_UBI_FASTMAP
199 #define CONFIG_RBTREE
201 #define MTDPARTS_DEFAULT \
202 "mtdparts=ff705000.spi.0:" \
208 "-(rcvrfs);" /* Recovery */ \
210 #define CONFIG_ENV_IS_IN_SPI_FLASH
211 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
212 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
213 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
214 #define CONFIG_ENV_OFFSET 0x100000
215 #define CONFIG_ENV_OFFSET_REDUND \
216 (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
218 #define CONFIG_MISC_INIT_R
219 #define CONFIG_BOARD_LATE_INIT
221 /* Enable DFU to SF and RAM */
222 #define CONFIG_DFU_RAM
223 #define CONFIG_DFU_SF
225 /* Support changing the prompt string */
226 #define CONFIG_CMDLINE_PS_SUPPORT
228 /* The rest of the configuration is shared */
229 #include <configs/socfpga_common.h>
231 #endif /* __CONFIG_SAMTEC_VINING_FPGA_H__ */