1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015-2019 Marek Vasut <marex@denx.de>
5 #ifndef __CONFIG_SOFTING_VINING_FPGA_H__
6 #define __CONFIG_SOFTING_VINING_FPGA_H__
8 #include <asm/arch/base_addr_ac5.h>
10 /* Memory configurations */
11 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */
14 #define CONFIG_BOOTFILE "fitImage"
15 #define CONFIG_BOOTCOMMAND "run selboot"
16 #define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MiB */
17 #define CONFIG_SYS_LOAD_ADDR 0x01000000
19 /* Ethernet on SoC (EMAC) */
21 /* Extra Environment */
22 #define CONFIG_HOSTNAME "socfpga_vining_fpga"
25 * Active LOW GPIO buttons:
26 * A: GPIO 77 ... the button between USB B and ethernet
27 * B: GPIO 78 ... the button between USB A ports
30 * if button B is pressed, boot recovery system after 10 seconds
31 * if force_boottype is set, boot system depending on the value in the
32 * $force_boottype variable after 1 second
33 * if button B is not pressed and force_boottype is not set, boot normal
34 * Linux system after 5 seconds
37 #define CONFIG_EXTRA_ENV_SETTINGS \
41 "bootscript=boot.scr\0" \
44 "ubipart=ubi0:vining-fpga-rootfs\0" \
45 "ubisfcs=1\0" /* Default is flash at CS#1 */ \
47 "hostname=vining_fpga\0" \
48 "kernel_addr_r=0x10000000\0" \
49 "fdt_addr_r=0x20000000\0" \
50 "fdt_high=0xffffffff\0" \
51 "initrd_high=0xffffffff\0" \
52 "dfu_alt_info=qspi0 sf 0:0;qspi1 sf 0:1\0" \
53 "mtdparts_0_16m=ff705000.spi.0:" /* 16MiB+128MiB SF config */ \
59 "-(rcvrfs)\0" /* Recovery */ \
60 "mtdparts_0_256m=ff705000.spi.0:" /* 256MiB(+256MiB) config */ \
66 "14720k(rcvrfs)," /* Recovery */ \
67 "64m(rootfs)," /* Root */ \
68 "-(userfs)\0" /* User */ \
69 "mtdparts_1_128m=ff705000.spi.1:" /* 16MiB+128MiB SF config */ \
72 "mtdparts_1_256m=ff705000.spi.1:" /* 256MiB+256MiB SF config */ \
74 "update_filename=u-boot-with-spl-dtb.sfp\0" \
75 "update_qspi_offset=0x0\0" \
76 "update_qspi=" /* Update the QSPI firmware */ \
77 "if sf probe ; then " \
78 "if tftp ${update_filename} ; then " \
79 "sf update ${loadaddr} ${update_qspi_offset} ${filesize} ; " \
83 "setenv sf_size_0 ; setenv sf_size_1 ; " \
84 "sf probe 0:0 && setenv sf_size_0 ${sf_size} ; " \
85 "sf probe 0:1 && setenv sf_size_1 ${sf_size} ; " \
86 "if test -z \"${sf_size_1}\" ; then " \
88 "setenv mtdparts_0 ${mtdparts_0_256m} ; " \
89 "setenv mtdparts_1 ; " \
90 "elif test \"${sf_size_0}\" = \"1000000\" ; then " \
91 /* 16MiB+128MiB SF */ \
92 "setenv mtdparts_0 ${mtdparts_0_16m} ; " \
93 "setenv mtdparts_1 ${mtdparts_1_128m} ; " \
95 /* 256MiB+256MiB SF */ \
96 "setenv mtdparts_0 ${mtdparts_0_256m} ; " \
97 "setenv mtdparts_1 ${mtdparts_1_256m} ; " \
99 "fpga_filename=output_file.rbf\0" \
100 "load_fpga=" /* Load FPGA bitstream */ \
101 "if tftp ${fpga_filename} ; then " \
102 "fpga load 0 $loadaddr $filesize ; " \
106 "setenv bootargs ${bootargs} " \
107 "console=${consdev},${baudrate}\0" \
109 "setenv bootargs ${bootargs} " \
110 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
111 "${netmask}:${hostname}:${netdev}:off\0" \
113 "setenv bootargs ${bootargs} ${miscargs}\0" \
115 "if test -z \"${sf_size_1}\" ; then " \
116 "setenv mtdparts \"${mtdparts_0}\" ; " \
118 "setenv mtdparts \"${mtdparts_0};${mtdparts_1}\" ; " \
120 "setenv bootargs ${bootargs} mtdparts=${mtdparts}\0" \
121 "addargs=run addcons addmtd addmisc\0" \
123 "ubi part ${ubimtd} ; ubifsmount ${ubipart} ; " \
124 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
126 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
127 "miscargs=nohlt panic=1\0" \
129 "setenv bootargs ubi.mtd=${ubimtdnr} " \
130 "root=${ubipart} rootfstype=ubifs\0" \
132 "setenv bootargs root=/dev/nfs rw " \
133 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
135 "if test \"${boottype}\" = \"rcvr\" ; then " \
136 "setenv ubisfcs 0 ; " \
137 "setenv ubimtd rcvrfs ; " \
138 "setenv ubimtdnr 5 ; " \
139 "setenv mtdparts mtdparts=${mtdparts_0} ; " \
140 "setenv mtdids nor0=ff705000.spi.0 ; " \
141 "setenv ubipart ubi0:vining-fpga-rootfs ; " \
143 "if test \"${sf_size_0}\" = \"1000000\" ; then "\
144 /* 16MiB+128MiB SF */ \
145 "setenv ubisfcs 1 ; " \
146 "setenv ubimtd rootfs ; " \
147 "setenv ubimtdnr 6 ; " \
148 "setenv mtdparts mtdparts=${mtdparts_1} ; " \
149 "setenv mtdids nor0=ff705000.spi.1 ; " \
150 "setenv ubipart ubi0:vining-fpga-rootfs ; " \
152 /* 256MiB(+256MiB) SF */ \
153 "setenv ubisfcs 0 ; " \
154 "setenv ubimtd rootfs ; " \
155 "setenv ubimtdnr 6 ; " \
156 "setenv mtdparts mtdparts=${mtdparts_0} ; " \
157 "setenv mtdids nor0=ff705000.spi.0 ; " \
158 "setenv ubipart ubi0:vining-fpga-rootfs ; " \
161 "sf probe 0:${ubisfcs}\0" \
163 "if test -z \"${sf_size_1}\" ; then " /* 1x256MiB SF */ \
164 "imxtract ${kernel_addr_r} fdt@1 ${fdt_addr_r} && " \
165 "fdt addr ${fdt_addr_r} && " \
167 "fdt set /soc/spi@ff705000/n25q00@1 status disabled && " \
168 "bootm ${kernel_addr_r}:kernel@1 - ${fdt_addr_r} ; " \
170 "bootm ${kernel_addr_r} ; " \
173 "run ubi_sfsel ubiload ubiargs addargs boot_kernel\0" \
175 "run ubiload nfsargs addip addargs boot_kernel\0" \
177 "run netload ubiargs addargs boot_kernel\0" \
179 "run netload nfsargs addip addargs boot_kernel\0" \
180 "selboot=" /* Select from where to boot. */ \
181 "run sf_identify ; " \
182 "if test \"${bootmode}\" = \"qspi\" ; then " \
184 "if test \"${boottype}\" = \"rcvr\" ; then " \
185 "echo \"Booting recovery system\" ; " \
186 "led 3 on ; " /* Bottom RED */ \
188 "led 1 on ; " /* Top RED */ \
190 "else echo \"Unsupported boot mode: \"${bootmode} ; " \
192 "socfpga_legacy_reset_compat=1\0"
194 /* Support changing the prompt string */
195 #define CONFIG_CMDLINE_PS_SUPPORT
197 /* The rest of the configuration is shared */
198 #include <configs/socfpga_common.h>
200 #endif /* __CONFIG_SOFTING_VINING_FPGA_H__ */