1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2015-2019 Marek Vasut <marex@denx.de>
5 #ifndef __CONFIG_SOFTING_VINING_FPGA_H__
6 #define __CONFIG_SOFTING_VINING_FPGA_H__
8 #include <asm/arch/base_addr_ac5.h>
10 /* Memory configurations */
11 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */
14 #define CONFIG_BOOTFILE "fitImage"
15 #define CONFIG_BOOTCOMMAND "run selboot"
16 #define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MiB */
17 #define CONFIG_LOADADDR 0x01000000
18 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
20 /* Ethernet on SoC (EMAC) */
22 /* Extra Environment */
23 #define CONFIG_HOSTNAME "socfpga_vining_fpga"
26 * Active LOW GPIO buttons:
27 * A: GPIO 77 ... the button between USB B and ethernet
28 * B: GPIO 78 ... the button between USB A ports
31 * if button B is pressed, boot recovery system after 10 seconds
32 * if force_boottype is set, boot system depending on the value in the
33 * $force_boottype variable after 1 second
34 * if button B is not pressed and force_boottype is not set, boot normal
35 * Linux system after 5 seconds
38 #define CONFIG_EXTRA_ENV_SETTINGS \
42 "bootscript=boot.scr\0" \
45 "ubipart=ubi0:vining-fpga-rootfs\0" \
46 "ubisfcs=1\0" /* Default is flash at CS#1 */ \
48 "hostname=vining_fpga\0" \
49 "kernel_addr_r=0x10000000\0" \
50 "fdt_addr_r=0x20000000\0" \
51 "fdt_high=0xffffffff\0" \
52 "initrd_high=0xffffffff\0" \
53 "dfu_alt_info=qspi0 sf 0:0;qspi1 sf 0:1\0" \
54 "mtdparts_0_16m=ff705000.spi.0:" /* 16MiB+128MiB SF config */ \
60 "-(rcvrfs)\0" /* Recovery */ \
61 "mtdparts_0_256m=ff705000.spi.0:" /* 256MiB(+256MiB) config */ \
67 "14720k(rcvrfs)," /* Recovery */ \
68 "64m(rootfs)," /* Root */ \
69 "-(userfs)\0" /* User */ \
70 "mtdparts_1_128m=ff705000.spi.1:" /* 16MiB+128MiB SF config */ \
73 "mtdparts_1_256m=ff705000.spi.1:" /* 256MiB+256MiB SF config */ \
75 "update_filename=u-boot-with-spl-dtb.sfp\0" \
76 "update_qspi_offset=0x0\0" \
77 "update_qspi=" /* Update the QSPI firmware */ \
78 "if sf probe ; then " \
79 "if tftp ${update_filename} ; then " \
80 "sf update ${loadaddr} ${update_qspi_offset} ${filesize} ; " \
84 "setenv sf_size_0 ; setenv sf_size_1 ; " \
85 "sf probe 0:0 && setenv sf_size_0 ${sf_size} ; " \
86 "sf probe 0:1 && setenv sf_size_1 ${sf_size} ; " \
87 "if test -z \"${sf_size_1}\" ; then " \
89 "setenv mtdparts_0 ${mtdparts_0_256m} ; " \
90 "setenv mtdparts_1 ; " \
91 "elif test \"${sf_size_0}\" = \"1000000\" ; then " \
92 /* 16MiB+128MiB SF */ \
93 "setenv mtdparts_0 ${mtdparts_0_16m} ; " \
94 "setenv mtdparts_1 ${mtdparts_1_128m} ; " \
96 /* 256MiB+256MiB SF */ \
97 "setenv mtdparts_0 ${mtdparts_0_256m} ; " \
98 "setenv mtdparts_1 ${mtdparts_1_256m} ; " \
100 "fpga_filename=output_file.rbf\0" \
101 "load_fpga=" /* Load FPGA bitstream */ \
102 "if tftp ${fpga_filename} ; then " \
103 "fpga load 0 $loadaddr $filesize ; " \
107 "setenv bootargs ${bootargs} " \
108 "console=${consdev},${baudrate}\0" \
110 "setenv bootargs ${bootargs} " \
111 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
112 "${netmask}:${hostname}:${netdev}:off\0" \
114 "setenv bootargs ${bootargs} ${miscargs}\0" \
116 "if test -z \"${sf_size_1}\" ; then " \
117 "setenv mtdparts \"${mtdparts_0}\" ; " \
119 "setenv mtdparts \"${mtdparts_0};${mtdparts_1}\" ; " \
121 "setenv bootargs ${bootargs} mtdparts=${mtdparts}\0" \
122 "addargs=run addcons addmtd addmisc\0" \
124 "ubi part ${ubimtd} ; ubifsmount ${ubipart} ; " \
125 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
127 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
128 "miscargs=nohlt panic=1\0" \
130 "setenv bootargs ubi.mtd=${ubimtdnr} " \
131 "root=${ubipart} rootfstype=ubifs\0" \
133 "setenv bootargs root=/dev/nfs rw " \
134 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
136 "if test \"${boottype}\" = \"rcvr\" ; then " \
137 "setenv ubisfcs 0 ; " \
138 "setenv ubimtd rcvrfs ; " \
139 "setenv ubimtdnr 5 ; " \
140 "setenv mtdparts mtdparts=${mtdparts_0} ; " \
141 "setenv mtdids nor0=ff705000.spi.0 ; " \
142 "setenv ubipart ubi0:vining-fpga-rootfs ; " \
144 "if test \"${sf_size_0}\" = \"1000000\" ; then "\
145 /* 16MiB+128MiB SF */ \
146 "setenv ubisfcs 1 ; " \
147 "setenv ubimtd rootfs ; " \
148 "setenv ubimtdnr 6 ; " \
149 "setenv mtdparts mtdparts=${mtdparts_1} ; " \
150 "setenv mtdids nor0=ff705000.spi.1 ; " \
151 "setenv ubipart ubi0:vining-fpga-rootfs ; " \
153 /* 256MiB(+256MiB) SF */ \
154 "setenv ubisfcs 0 ; " \
155 "setenv ubimtd rootfs ; " \
156 "setenv ubimtdnr 6 ; " \
157 "setenv mtdparts mtdparts=${mtdparts_0} ; " \
158 "setenv mtdids nor0=ff705000.spi.0 ; " \
159 "setenv ubipart ubi0:vining-fpga-rootfs ; " \
162 "sf probe 0:${ubisfcs}\0" \
164 "if test -z \"${sf_size_1}\" ; then " /* 1x256MiB SF */ \
165 "imxtract ${kernel_addr_r} fdt@1 ${fdt_addr_r} && " \
166 "fdt addr ${fdt_addr_r} && " \
168 "fdt set /soc/spi@ff705000/n25q00@1 status disabled && " \
169 "bootm ${kernel_addr_r}:kernel@1 - ${fdt_addr_r} ; " \
171 "bootm ${kernel_addr_r} ; " \
174 "run ubi_sfsel ubiload ubiargs addargs boot_kernel\0" \
176 "run ubiload nfsargs addip addargs boot_kernel\0" \
178 "run netload ubiargs addargs boot_kernel\0" \
180 "run netload nfsargs addip addargs boot_kernel\0" \
181 "selboot=" /* Select from where to boot. */ \
182 "run sf_identify ; " \
183 "if test \"${bootmode}\" = \"qspi\" ; then " \
185 "if test \"${boottype}\" = \"rcvr\" ; then " \
186 "echo \"Booting recovery system\" ; " \
187 "led 3 on ; " /* Bottom RED */ \
189 "led 1 on ; " /* Top RED */ \
191 "else echo \"Unsupported boot mode: \"${bootmode} ; " \
193 "socfpga_legacy_reset_compat=1\0"
195 /* Support changing the prompt string */
196 #define CONFIG_CMDLINE_PS_SUPPORT
198 /* The rest of the configuration is shared */
199 #include <configs/socfpga_common.h>
201 #endif /* __CONFIG_SOFTING_VINING_FPGA_H__ */