Rename CONFIG_EHCI_IS_TDI to CONFIG_USB_EHCI_IS_TDI
[platform/kernel/u-boot.git] / include / configs / socfpga_n5x_socdk.h
1 /* SPDX-License-Identifier: GPL-2.0
2  *
3  * Copyright (C) 2020-2021 Intel Corporation <www.intel.com>
4  *
5  */
6
7 #ifndef __CONFIG_SOCFGPA_N5X_H__
8 #define __CONFIG_SOCFGPA_N5X_H__
9
10 #include <configs/socfpga_soc64_common.h>
11
12 #undef CONFIG_EXTRA_ENV_SETTINGS
13 #define CONFIG_EXTRA_ENV_SETTINGS \
14         "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
15         "bootfile=" CONFIG_BOOTFILE "\0" \
16         "fdt_addr=1100000\0" \
17         "fdtimage=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
18         "mmcroot=/dev/mmcblk0p2\0" \
19         "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
20                 " root=${mmcroot} rw rootwait;" \
21                 "booti ${loadaddr} - ${fdt_addr}\0" \
22         "mmcload=mmc rescan;" \
23                 "load mmc 0:1 ${loadaddr} ${bootfile};" \
24                 "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
25         "mmcfitboot=setenv bootargs " CONFIG_BOOTARGS \
26                 " root=${mmcroot} rw rootwait;" \
27                 "bootm ${loadaddr}\0" \
28         "mmcfitload=mmc rescan;" \
29                 "load mmc 0:1 ${loadaddr} ${bootfile}\0" \
30         "ramboot=setenv bootargs " CONFIG_BOOTARGS";" \
31                 "booti ${loadaddr} - ${fdt_addr}\0" \
32         "linux_qspi_enable=if sf probe; then " \
33                 "echo Enabling QSPI at Linux DTB...;" \
34                 "fdt addr ${fdt_addr}; fdt resize;" \
35                 "fdt set /soc/spi@ff8d2000 status okay;" \
36                 "if fdt set /soc/clocks/qspi-clk clock-frequency" \
37                 " ${qspi_clock}; then" \
38                 " else fdt set /soc/clkmgr/clocks/qspi_clk clock-frequency" \
39                 " ${qspi_clock}; fi; fi\0" \
40         "scriptaddr=0x02100000\0" \
41         "scriptfile=u-boot.scr\0" \
42         "fatscript=if fatload mmc 0:1 ${scriptaddr} ${scriptfile};" \
43                    "then source ${scriptaddr}; fi\0"
44
45 #endif  /* __CONFIG_SOCFGPA_N5X_H__ */