1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2022 Google LLC
5 #ifndef __SOCFGPA_CHAMELEONV3_H__
6 #define __SOCFGPA_CHAMELEONV3_H__
8 #include <asm/arch/base_addr_a10.h>
11 * U-Boot general configurations
14 /* Memory configurations */
15 #define PHYS_SDRAM_1_SIZE 0x40000000
18 * Serial / UART configurations
20 #define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
22 #define CFG_EXTRA_ENV_SETTINGS \
23 "distro_bootcmd=bridge enable; " \
24 "load mmc 0:1 ${loadaddr} u-boot.txt; " \
25 "env import -t ${loadaddr}; " \
31 /* reload value when timer count to zero */
32 #define TIMER_LOAD_VAL 0xFFFFFFFF
34 /* The rest of the configuration is shared */
35 #include <configs/socfpga_common.h>
37 #endif /* __SOCFGPA_CHAMELEONV3_H__ */