1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2017-2020 Hitachi Power Grids
6 #ifndef __CONFIG_SOCFPGA_SECU1_H__
7 #define __CONFIG_SOCFPGA_SECU1_H__
9 #include <asm/arch/base_addr_ac5.h>
11 /* Eternal oscillator */
12 #define CFG_SYS_TIMER_RATE 40000000
14 /* Memory configurations */
15 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512MiB on SECU1 */
18 * We use bootcounter in i2c nvram of the RTC (0x68)
19 * The offset fopr the bootcounter is 0x9e, which are
20 * the last two bytes of the 128 bytes large NVRAM in the
21 * RTC which begin at address 0x20
23 #define CFG_SYS_I2C_RTC_ADDR 0x68
25 /* The rest of the configuration is shared */
26 #include <configs/socfpga_common.h>
28 #endif /* __CONFIG_SOCFPGA_SECU1_H__ */