include/configs/socfpga_arria5_secu1.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2017-2020 Hitachi Power Grids
   4  *
   5  */
   6 #ifndef __CONFIG_SOCFPGA_SECU1_H__
   7 #define __CONFIG_SOCFPGA_SECU1_H__
   8
   9 #include <asm/arch/base_addr_ac5.h>
  10 #include <linux/stringify.h>
  11
  12 #define CONFIG_HUSH_INIT_VAR
  13 /* Eternal oscillator */
  14 #define CONFIG_SYS_TIMER_RATE   40000000
  15
  16 /* Memory configurations */
  17 #define PHYS_SDRAM_1_SIZE       0x20000000      /* 512MiB on SECU1 */
  18
  19 /*
  20  * We use bootcounter in i2c nvram of the RTC (0x68)
  21  * The offset fopr the bootcounter is 0x9e, which are
  22  * the last two bytes of the 128 bytes large NVRAM in the
  23  * RTC which begin at address 0x20
  24  */
  25 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
  26
  27 #define CONFIG_SYS_BOOTM_LEN            (64 << 20)
  28
  29 /* Environment settings */
  30
  31 /*
  32  * FPGA Remote Update related environment
  33  *
  34  * Note that since those commands access the FPGA, the HPS-to-FPGA
  35  * bridges MUST have been previously enabled (for example
  36  * with 'bridge enable').
  37  */
  38 #define FPGA_RMTU_ENV \
  39         "rmtu_page=0xFF29000C\0" \
  40         "rmtu_reconfig=0xFF290018\0" \
  41         "fpga_safebase=0x0\0" \
  42         "fpga_userbase=0x2000000\0" \
  43         "_fpga_loaduser=echo Loading FPGA USER image..." \
  44                 " && mw ${rmtu_page} ${fpga_userbase} && mw ${rmtu_reconfig} 1\0" \
  45         "_fpga_loadsafe=echo Loading FPGA SAFE image..." \
  46                 " && mw ${rmtu_page} ${fpga_safebase} && mw ${rmtu_reconfig} 1\0" \
  47
  48 #define CONFIG_KM_NEW_ENV \
  49         "newenv=" \
  50                 "nand erase 0x100000 0x40000\0"
  51
  52 #define CONFIG_KM_DEF_ENV_BOOTTARGETS \
  53         "release=" \
  54                 "run newenv; reset\0" \
  55         "develop=" \
  56                 "tftp 0x200000 scripts/develop-secu.txt && env import -t 0x200000 ${filesize} && saveenv && reset\0"
  57
  58 #define CONFIG_EXTRA_ENV_SETTINGS \
  59         FPGA_RMTU_ENV \
  60         CONFIG_KM_DEF_ENV_BOOTTARGETS \
  61         CONFIG_KM_NEW_ENV \
  62         "socfpga_legacy_reset_compat=1\0"       \
  63         "altbootcmd=run bootcmd;\0"     \
  64         "bootlimit=6\0" \
  65         "bootnum=1\0" \
  66         "bootretry=" __stringify(CONFIG_BOOT_RETRY_TIME) "\0" \
  67         "fdt_addr=" __stringify(CONFIG_KM_FDT_ADDR) "\0" \
  68         "load=tftpboot ${loadaddr} u-boot-with-nand-spl.sfp\0" \
  69         "loadaddr=" __stringify(CONFIG_KM_KERNEL_ADDR) "\0" \
  70         "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
  71         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
  72         "update=nand erase 0x0 0x00100000 && nand write ${loadaddr} 0x0 ${filesize}\0" \
  73         "userload=ubi part nand.ubi &&" \
  74                 "ubi check rootfs$bootnum &&" \
  75                 "ubi read $fdt_addr dtb$bootnum &&" \
  76                 "ubi read $loadaddr kernel$bootnum\0" \
  77         "userboot=setenv bootargs " CONFIG_BOOTARGS \
  78                 " ubi.mtd=1 ubi.block=0,rootfs$bootnum root=/dev/ubiblock0_$ubivolid"   \
  79                 " ro rootfstype=squashfs init=sbin/preinit;" \
  80                 "bootz ${loadaddr} - ${fdt_addr}\0" \
  81         "verify=y\0"
  82
  83 /* The rest of the configuration is shared */
  84 #include <configs/socfpga_common.h>
  85
  86 #endif  /* __CONFIG_SOCFPGA_SECU1_H__ */