1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2015-2019 Altera Corporation <www.altera.com>
6 #ifndef __CONFIG_SOCFGPA_ARRIA10_H__
7 #define __CONFIG_SOCFGPA_ARRIA10_H__
9 #include <asm/arch/base_addr_a10.h>
12 #define CONFIG_LOADADDR 0x01000000
13 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
16 * U-Boot general configurations
19 /* Memory configurations */
20 #define PHYS_SDRAM_1_SIZE 0x40000000
23 * Serial / UART configurations
25 #define CONFIG_SYS_NS16550_MEM32
26 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
31 /* reload value when timer count to zero */
32 #define TIMER_LOAD_VAL 0xFFFFFFFF
35 * Flash configurations
37 #define CONFIG_SYS_MAX_FLASH_BANKS 1
39 /* SPL memory allocation configuration, this is for FAT implementation */
40 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00015000
42 /* The rest of the configuration is shared */
43 #include <configs/socfpga_common.h>
45 #endif /* __CONFIG_SOCFGPA_ARRIA10_H__ */