2 * Copyright (C) ST-Ericsson SA 2009
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #define CONFIG_SKIP_LOWLEVEL_INIT
31 #define CONFIG_SNOWBALL
32 #define CONFIG_SYS_ICACHE_OFF
33 #define CONFIG_SYS_DCACHE_OFF
34 #define CONFIG_ARCH_CPU_INIT
37 * High Level Configuration Options
43 #define CONFIG_SYS_MEMTEST_START 0x00000000
44 #define CONFIG_SYS_MEMTEST_END 0x1FFFFFFF
45 #define CONFIG_SYS_HZ 1000 /* must be 1000 */
47 /*-----------------------------------------------------------------------
48 * Size of environment and malloc() pool
51 * If you use U-Boot as crash kernel, make sure that it does not overwrite
52 * information saved by kexec during panic. Kexec expects the start
53 * address of the executable 32K above "crashkernel" address.
56 * Size of malloc() pool
58 #define CONFIG_ENV_SIZE (8*1024)
59 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256*1024)
61 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */
63 #define CONFIG_ENV_IS_IN_MMC
64 #define CONFIG_CMD_ENV
65 #define CONFIG_CMD_SAVEENV
66 #define CONFIG_ENV_OFFSET 0x0118000
67 #define CONFIG_SYS_MMC_ENV_DEV 0 /* SLOT2: eMMC */
72 #define CONFIG_PL011_SERIAL
73 #define CONFIG_PL011_SERIAL_RLCR
74 #define CONFIG_PL011_SERIAL_FLUSH_ON_INIT
77 * U8500 UART registers base for 3 serial devices
79 #define CFG_UART0_BASE 0x80120000
80 #define CFG_UART1_BASE 0x80121000
81 #define CFG_UART2_BASE 0x80007000
82 #define CFG_SERIAL0 CFG_UART0_BASE
83 #define CFG_SERIAL1 CFG_UART1_BASE
84 #define CFG_SERIAL2 CFG_UART2_BASE
85 #define CONFIG_PL011_CLOCK 38400000
86 #define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1, \
88 #define CONFIG_CONS_INDEX 2
89 #define CONFIG_BAUDRATE 115200
92 * Devices and file systems
95 #define CONFIG_GENERIC_MMC
96 #define CONFIG_DOS_PARTITION
101 #define CONFIG_CMD_MEMORY
102 #define CONFIG_CMD_BOOTD
103 #define CONFIG_CMD_BDI
104 #define CONFIG_CMD_IMI
105 #define CONFIG_CMD_MISC
106 #define CONFIG_CMD_RUN
107 #define CONFIG_CMD_ECHO
108 #define CONFIG_CMD_CONSOLE
109 #define CONFIG_CMD_LOADS
110 #define CONFIG_CMD_LOADB
111 #define CONFIG_CMD_MMC
112 #define CONFIG_CMD_FAT
113 #define CONFIG_CMD_EXT2
114 #define CONFIG_CMD_SOURCE
116 #ifndef CONFIG_BOOTDELAY
117 #define CONFIG_BOOTDELAY 1
119 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
121 #undef CONFIG_BOOTARGS
122 #define CONFIG_BOOTCOMMAND \
124 "if run loadbootscript; " \
125 "then run bootscript; " \
128 "then run mmcboot; " \
131 "if run emmcloadbootscript; " \
132 "then run bootscript; " \
134 "if run emmcload; " \
135 "then run emmcboot; " \
137 "echo No media to boot from; " \
143 #define CONFIG_EXTRA_ENV_SETTINGS \
145 "loadaddr=0x00100000\0" \
146 "console=ttyAMA2,115200n8\0" \
147 "loadbootscript=fatload mmc 1:1 ${loadaddr} boot.scr\0" \
148 "emmcloadbootscript=fatload mmc 0:2 ${loadaddr} boot.scr\0" \
149 "bootscript=echo Running bootscript " \
150 "from mmc ...; source ${loadaddr}\0" \
151 "memargs256=mem=96M@0 mem_modem=32M@96M mem=32M@128M " \
152 "hwmem=22M@160M pmem_hwb=42M@182M mem_mali=32@224M\0" \
153 "memargs512=mem=96M@0 mem_modem=32M@96M hwmem=32M@128M " \
154 "mem=64M@160M mem_mali=32M@224M " \
155 "pmem_hwb=128M@256M mem=128M@384M\0" \
156 "memargs1024=mem=128M@0 mali.mali_mem=32M@128M " \
157 "hwmem=168M@M160M mem=48M@328M " \
158 "mem_issw=1M@383M mem=640M@384M\0" \
159 "memargs=setenv bootargs ${bootargs} ${memargs1024}\0" \
160 "emmcload=fatload mmc 0:2 ${loadaddr} uImage\0" \
161 "mmcload=fatload mmc 1:1 ${loadaddr} uImage\0" \
162 "commonargs=setenv bootargs console=${console} " \
164 "emmcargs=setenv bootargs ${bootargs} " \
165 "root=/dev/mmcblk0p3 " \
167 "addcons=setenv bootargs ${bootargs} " \
168 "console=${console}\0" \
169 "emmcboot=echo Booting from eMMC ...; " \
170 "run commonargs emmcargs memargs; " \
171 "bootm ${loadaddr}\0" \
172 "mmcargs=setenv bootargs ${bootargs} " \
173 "root=/dev/mmcblk1p2 " \
174 "rootwait earlyprintk\0" \
175 "mmcboot=echo Booting from external MMC ...; " \
176 "run commonargs mmcargs memargs; " \
177 "bootm ${loadaddr}\0" \
178 "fdt_high=0x2BC00000\0" \
179 "stdout=serial,usbtty\0" \
180 "stdin=serial,usbtty\0" \
181 "stderr=serial,usbtty\0"
183 /*-----------------------------------------------------------------------
184 * Miscellaneous configurable options
187 #define CONFIG_SYS_LONGHELP /* undef to save memory */
188 #define CONFIG_SYS_PROMPT "U8500 $ " /* Monitor Command Prompt */
189 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
191 /* Print Buffer Size */
192 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
193 + sizeof(CONFIG_SYS_PROMPT) + 16)
194 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
195 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
197 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
198 #define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */
199 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1
201 #define CONFIG_SYS_HUSH_PARSER 1
202 #define CONFIG_CMDLINE_EDITING
204 #define CONFIG_SETUP_MEMORY_TAGS 2
205 #define CONFIG_INITRD_TAG 1
206 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
209 * Physical Memory Map
211 #define CONFIG_NR_DRAM_BANKS 1
212 #define PHYS_SDRAM_1 0x00000000 /* DDR-SDRAM Bank #1 */
215 * additions for new relocation code
217 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
218 #define CONFIG_SYS_MAX_RAM_SIZE 0x40000000
219 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000
220 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
221 CONFIG_SYS_INIT_RAM_SIZE - \
222 GENERATED_GBL_DATA_SIZE)
223 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
225 /* landing address before relocation */
226 #ifndef CONFIG_SYS_TEXT_BASE
227 #define CONFIG_SYS_TEXT_BASE 0x0
231 * FLASH and environment organization
233 #define CONFIG_SYS_NO_FLASH
236 * base register values for U8500
238 #define CFG_PRCMU_BASE 0x80157000 /* Power, reset and clock */
242 * U8500 GPIO register base for 9 banks
244 #define CONFIG_DB8500_GPIO
245 #define CFG_GPIO_0_BASE 0x8012E000
246 #define CFG_GPIO_1_BASE 0x8012E080
247 #define CFG_GPIO_2_BASE 0x8000E000
248 #define CFG_GPIO_3_BASE 0x8000E080
249 #define CFG_GPIO_4_BASE 0x8000E100
250 #define CFG_GPIO_5_BASE 0x8000E180
251 #define CFG_GPIO_6_BASE 0x8011E000
252 #define CFG_GPIO_7_BASE 0x8011E080
253 #define CFG_GPIO_8_BASE 0xA03FE000
255 #define CFG_FSMC_BASE 0x80000000 /* FSMC Controller */
257 #endif /* __CONFIG_H */