1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Bluewater Systems Snapper 9260 and 9G20 modules
5 * (C) Copyright 2011 Bluewater Systems
6 * Author: Andre Renaud <andre@bluewatersys.com>
7 * Author: Ryan Mallon <ryan@bluewatersys.com>
13 /* SoC type is defined in boards.cfg */
14 #include <asm/hardware.h>
15 #include <linux/sizes.h>
17 /* ARM asynchronous clock */
18 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* External Crystal, in Hz */
19 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768
23 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
24 #define CONFIG_SETUP_MEMORY_TAGS
25 #define CONFIG_INITRD_TAG
26 #define CONFIG_SKIP_LOWLEVEL_INIT
29 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
30 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) /* 64MB */
31 #define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \
32 GENERATED_GBL_DATA_SIZE)
34 /* Mem test settings */
37 #define CONFIG_SYS_MAX_NAND_DEVICE 1
38 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
39 #define CONFIG_SYS_NAND_DBW_8
40 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */
41 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */
42 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
43 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
48 #define CONFIG_NET_RETRY_COUNT 20
49 #define CONFIG_RESET_PHY_R
50 #define CONFIG_AT91_WANTS_COMMON_PHY
51 #define CONFIG_TFTP_PORT
54 #define CONFIG_USB_ATMEL
55 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
56 #define CONFIG_USB_OHCI_NEW
57 #define CONFIG_SYS_USB_OHCI_CPU_INIT
58 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
59 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
60 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
62 /* GPIOs and IO expander */
63 #define CONFIG_ATMEL_LEGACY
64 #define CONFIG_AT91_GPIO_PULLUP 1
65 #define CONFIG_PCA953X
66 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x28
67 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x28, 16} }
69 /* UARTs/Serial console */
70 #ifndef CONFIG_DM_SERIAL
71 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
72 #define CONFIG_USART_ID ATMEL_ID_SYS
75 /* I2C - Bit-bashed */
76 #define CONFIG_SYS_I2C_LEGACY
77 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
78 #define CONFIG_SYS_I2C_SOFT_SPEED 100000
79 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
80 #define CONFIG_SOFT_I2C_READ_REPEATED_START
81 #define I2C_INIT do { \
82 at91_set_gpio_output(AT91_PIN_PA23, 1); \
83 at91_set_gpio_output(AT91_PIN_PA24, 1); \
84 at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
85 at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
87 #define I2C_SOFT_DECLARATIONS
89 #define I2C_TRISTATE at91_set_gpio_input(AT91_PIN_PA23, 1);
90 #define I2C_READ at91_get_gpio_value(AT91_PIN_PA23);
91 #define I2C_SDA(bit) do { \
93 at91_set_gpio_input(AT91_PIN_PA23, 1); \
95 at91_set_gpio_output(AT91_PIN_PA23, 1); \
96 at91_set_gpio_value(AT91_PIN_PA23, bit); \
99 #define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
100 #define I2C_DELAY udelay(2)
103 #define CONFIG_SYS_LOAD_ADDR 0x23000000
105 #define CONFIG_BOOTP_BOOTFILESIZE
107 /* Environment settings */
109 /* Console settings */
111 /* U-Boot memory settings */
112 #define CONFIG_SYS_MALLOC_LEN (1 << 20)
114 #endif /* __CONFIG_H */