include/configs/snapper9260.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Bluewater Systems Snapper 9260 and 9G20 modules
   4  *
   5  * (C) Copyright 2011 Bluewater Systems
   6  *   Author: Andre Renaud <andre@bluewatersys.com>
   7  *   Author: Ryan Mallon <ryan@bluewatersys.com>
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 /* SoC type is defined in boards.cfg */
  14 #include <asm/hardware.h>
  15 #include <linux/sizes.h>
  16
  17 /* ARM asynchronous clock */
  18 #define CONFIG_SYS_AT91_MAIN_CLOCK      18432000 /* External Crystal, in Hz */
  19 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
  20
  21 /* CPU */
  22
  23 /* SDRAM */
  24 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_CS1
  25 #define CONFIG_SYS_SDRAM_SIZE           (64 * 1024 * 1024) /* 64MB */
  26 #define CONFIG_SYS_INIT_SP_ADDR         (ATMEL_BASE_SRAM1 + 0x1000 - \
  27                                          GENERATED_GBL_DATA_SIZE)
  28
  29 /* Mem test settings */
  30
  31 /* NAND Flash */
  32 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  33 #define CONFIG_SYS_NAND_BASE            ATMEL_BASE_CS3
  34 #define CONFIG_SYS_NAND_DBW_8
  35 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21) /* AD21 */
  36 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22) /* AD22 */
  37 #define CONFIG_SYS_NAND_ENABLE_PIN      AT91_PIN_PC14
  38 #define CONFIG_SYS_NAND_READY_PIN       AT91_PIN_PC13
  39
  40 /* Ethernet */
  41 #define CONFIG_MACB
  42 #define CONFIG_RMII
  43 #define CONFIG_NET_RETRY_COUNT          20
  44 #define CONFIG_RESET_PHY_R
  45 #define CONFIG_AT91_WANTS_COMMON_PHY
  46 #define CONFIG_TFTP_PORT
  47
  48 /* USB */
  49 #define CONFIG_USB_ATMEL
  50 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
  51 #define CONFIG_USB_OHCI_NEW
  52 #define CONFIG_SYS_USB_OHCI_CPU_INIT
  53 #define CONFIG_SYS_USB_OHCI_REGS_BASE   ATMEL_UHP_BASE
  54 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "at91sam9260"
  55 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
  56
  57 /* GPIOs and IO expander */
  58 #define CONFIG_ATMEL_LEGACY
  59 #define CONFIG_AT91_GPIO_PULLUP         1
  60 #define CONFIG_PCA953X
  61 #define CONFIG_SYS_I2C_PCA953X_ADDR     0x28
  62 #define CONFIG_SYS_I2C_PCA953X_WIDTH    { {0x28, 16} }
  63
  64 /* UARTs/Serial console */
  65 #ifndef CONFIG_DM_SERIAL
  66 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  67 #define CONFIG_USART_ID                 ATMEL_ID_SYS
  68 #endif
  69
  70 /* I2C - Bit-bashed */
  71 #define CONFIG_SOFT_I2C_READ_REPEATED_START
  72 #define I2C_INIT do {                                                   \
  73                 at91_set_gpio_output(AT91_PIN_PA23, 1);                 \
  74                 at91_set_gpio_output(AT91_PIN_PA24, 1);                 \
  75                 at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1);        \
  76                 at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1);        \
  77         } while (0)
  78 #define I2C_SOFT_DECLARATIONS
  79 #define I2C_ACTIVE
  80 #define I2C_TRISTATE    at91_set_gpio_input(AT91_PIN_PA23, 1);
  81 #define I2C_READ        at91_get_gpio_value(AT91_PIN_PA23);
  82 #define I2C_SDA(bit) do {                                               \
  83                 if (bit) {                                              \
  84                         at91_set_gpio_input(AT91_PIN_PA23, 1);          \
  85                 } else {                                                \
  86                         at91_set_gpio_output(AT91_PIN_PA23, 1);         \
  87                         at91_set_gpio_value(AT91_PIN_PA23, bit);        \
  88                 }                                                       \
  89         } while (0)
  90 #define I2C_SCL(bit)    at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
  91 #define I2C_DELAY       udelay(2)
  92
  93 /* Boot options */
  94
  95 #define CONFIG_BOOTP_BOOTFILESIZE
  96
  97 /* Environment settings */
  98
  99 /* Console settings */
 100
 101 #endif /* __CONFIG_H */