1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2011 Samsung Electronics
5 * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board.
11 #include "exynos4-common.h"
13 #undef CONFIG_BOARD_COMMON
14 #undef CONFIG_USB_GADGET_DWC2_OTG_PHY
15 #undef CONFIG_REVISION_TAG
17 /* High Level Configuration Options */
18 #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
21 #define CONFIG_MACH_TYPE MACH_TYPE_SMDKV310
23 #define CONFIG_SYS_SDRAM_BASE 0x40000000
25 /* Handling Sleep Mode*/
26 #define S5P_CHECK_SLEEP 0x00000BAD
27 #define S5P_CHECK_DIDLE 0xBAD00000
28 #define S5P_CHECK_LPA 0xABAD0000
30 /* select serial console configuration */
31 #define EXYNOS4_DEFAULT_UART_OFFSET 0x010000
33 /* allow to overwrite serial and ethaddr */
34 #define CONFIG_ENV_OVERWRITE
37 #define CONFIG_SKIP_LOWLEVEL_INIT
38 #define COPY_BL2_FNPTR_ADDR 0x00002488
40 #define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
42 /* Miscellaneous configurable options */
43 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
44 /* memtest works on */
45 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
47 /* SMDKV310 has 4 bank of DRAM */
48 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
49 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
50 #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
51 #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
52 #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
53 #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
54 #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
55 #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
56 #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
58 /* FLASH and environment organization */
60 #define CONFIG_CLK_1000_400_200
62 /* MIU (Memory Interleaving Unit) */
63 #define CONFIG_MIU_2BIT_INTERLEAVED
65 #define CONFIG_SYS_MMC_ENV_DEV 0
66 #define RESERVE_BLOCK_SIZE (512)
67 #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
69 #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
71 #define CONFIG_SYS_INIT_SP_ADDR 0x02040000
73 /* U-Boot copy size from boot Media to DRAM.*/
74 #define COPY_BL2_SIZE 0x80000
75 #define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
76 #define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
78 /* Ethernet Controllor Driver */
80 #define CONFIG_ENV_SROM_BANK 1
81 #endif /*CONFIG_CMD_NET*/
83 #endif /* __CONFIG_H */