1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2011 Samsung Electronics
5 * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board.
11 #include "exynos4-common.h"
13 #undef CONFIG_BOARD_COMMON
14 #undef CONFIG_USB_GADGET_DWC2_OTG_PHY
16 /* High Level Configuration Options */
17 #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
19 #define CONFIG_SYS_SDRAM_BASE 0x40000000
21 /* Handling Sleep Mode*/
22 #define S5P_CHECK_SLEEP 0x00000BAD
23 #define S5P_CHECK_DIDLE 0xBAD00000
24 #define S5P_CHECK_LPA 0xABAD0000
27 #define COPY_BL2_FNPTR_ADDR 0x00002488
29 /* SMDKV310 has 4 bank of DRAM */
30 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
31 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
32 #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
33 #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
34 #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
35 #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
36 #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
37 #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
38 #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
40 /* FLASH and environment organization */
42 #define CONFIG_CLK_1000_400_200
44 /* MIU (Memory Interleaving Unit) */
45 #define CONFIG_MIU_2BIT_INTERLEAVED
47 #define RESERVE_BLOCK_SIZE (512)
48 #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
50 #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
52 #define CONFIG_SYS_INIT_SP_ADDR 0x02040000
54 /* Ethernet Controllor Driver */
56 #define CONFIG_ENV_SROM_BANK 1
57 #endif /*CONFIG_CMD_NET*/
59 #endif /* __CONFIG_H */