2 * Configuation settings for the Renesas SH7763RDP board
4 * Copyright (C) 2008 Renesas Solutions Corp.
5 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
7 * SPDX-License-Identifier: GPL-2.0+
15 #define CONFIG_CPU_SH7763 1
16 #define CONFIG_SH7763RDP 1
17 #define __LITTLE_ENDIAN 1
20 * Command line configuration.
22 #define CONFIG_CMD_SDRAM
23 #define CONFIG_CMD_FLASH
24 #define CONFIG_CMD_MEMORY
25 #define CONFIG_CMD_NET
26 #define CONFIG_CMD_MII
27 #define CONFIG_CMD_PING
28 #define CONFIG_CMD_SAVEENV
29 #define CONFIG_CMD_NFS
30 #define CONFIG_CMD_JFFS2
32 #define CONFIG_BOOTDELAY -1
33 #define CONFIG_BOOTARGS "console=ttySC2,115200 root=1f01"
34 #define CONFIG_ENV_OVERWRITE 1
36 #define CONFIG_VERSION_VARIABLE
37 #undef CONFIG_SHOW_BOOT_PROGRESS
40 #define CONFIG_SCIF_CONSOLE 1
41 #define CONFIG_BAUDRATE 115200
42 #define CONFIG_CONS_SCIF2 1
44 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000
45 #define CONFIG_SYS_LONGHELP /* undef to save memory */
46 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
47 #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */
48 #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
49 #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */
50 #define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments
52 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate
53 settings for this board */
56 #define CONFIG_SYS_SDRAM_BASE (0x8C000000)
57 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
58 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
59 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
62 #define CONFIG_SYS_FLASH_BASE (0xA0000000)
63 #define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
64 #define CONFIG_SYS_MAX_FLASH_BANKS (1)
65 #define CONFIG_SYS_MAX_FLASH_SECT (520)
68 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
69 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
70 #define CONFIG_SYS_MONITOR_LEN (128 * 1024)
71 /* Size of DRAM reserved for malloc() use */
72 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
73 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
75 #define CONFIG_SYS_FLASH_CFI
76 #define CONFIG_FLASH_CFI_DRIVER
77 #undef CONFIG_SYS_FLASH_QUIET_TEST
78 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
79 /* Timeout for Flash erase operations (in ms) */
80 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
81 /* Timeout for Flash write operations (in ms) */
82 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
83 /* Timeout for Flash set sector lock bit operations (in ms) */
84 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
85 /* Timeout for Flash clear lock bit operations (in ms) */
86 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
87 /* Use hardware flash sectors protection instead of U-Boot software protection */
88 #undef CONFIG_SYS_FLASH_PROTECTION
89 #undef CONFIG_SYS_DIRECT_FLASH_TFTP
90 #define CONFIG_ENV_IS_IN_FLASH
91 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
92 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
93 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
94 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
95 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
96 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
97 #define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
100 #define CONFIG_SYS_CLK_FREQ 66666666
101 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
102 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
103 #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
104 #define CONFIG_SYS_HZ 1000
107 #define CONFIG_SH_ETHER 1
108 #define CONFIG_SH_ETHER_USE_PORT (1)
109 #define CONFIG_SH_ETHER_PHY_ADDR (0x01)
110 #define CONFIG_PHYLIB
111 #define CONFIG_BITBANGMII
112 #define CONFIG_BITBANGMII_MULTI
113 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
115 #endif /* __SH7763RDP_H */