1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the sh7753evb board
5 * Copyright (C) 2012 Renesas Solutions Corp.
11 #define CONFIG_CPU_SH7753 1
13 #define CONFIG_DISPLAY_BOARDINFO
16 #define SH7753EVB_SDRAM_BASE (0x40000000)
17 #define SH7753EVB_SDRAM_SIZE (512 * 1024 * 1024)
19 #define CONFIG_SYS_PBSIZE 256
20 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
23 #define CONFIG_CONS_SCIF2 1
25 #define CONFIG_SYS_MEMTEST_START (SH7753EVB_SDRAM_BASE)
26 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
28 #undef CONFIG_SYS_LOADS_BAUD_CHANGE
30 #define CONFIG_SYS_SDRAM_BASE (SH7753EVB_SDRAM_BASE)
31 #define CONFIG_SYS_SDRAM_SIZE (SH7753EVB_SDRAM_SIZE)
32 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
35 #define CONFIG_SYS_MONITOR_BASE 0x00000000
36 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
37 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
38 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
41 #define CONFIG_SH_ETHER_USE_PORT 0
42 #define CONFIG_SH_ETHER_PHY_ADDR 18
43 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
44 #define CONFIG_SH_ETHER_USE_GETHER 1
45 #define CONFIG_BITBANGMII_MULTI
46 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
48 #define SH7753EVB_ETHERNET_MAC_BASE_SPI 0x00090000
49 #define SH7753EVB_SPI_SECTOR_SIZE (64 * 1024)
50 #define SH7753EVB_ETHERNET_MAC_BASE SH7753EVB_ETHERNET_MAC_BASE_SPI
51 #define SH7753EVB_ETHERNET_MAC_SIZE 17
52 #define SH7753EVB_ETHERNET_NUM_CH 2
55 #define CONFIG_SH_SPI_BASE 0xfe002000
58 #define CONFIG_SH_MMCIF_ADDR 0xffcb0000
59 #define CONFIG_SH_MMCIF_CLK 48000000
62 #define CONFIG_ENV_OVERWRITE 1
63 #define CONFIG_EXTRA_ENV_SETTINGS \
64 "netboot=bootp; bootm\0"
67 #define CONFIG_SYS_CLK_FREQ 48000000
68 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
69 #endif /* __SH7753EVB_H */