1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (c) 2011 The Chromium OS Authors.
9 #ifndef CONFIG_SPL_BUILD
10 #define CONFIG_IO_TRACE
14 #define CONFIG_SYS_TIMER_RATE 1000000
17 #define CONFIG_HOST_MAX_DEVICES 4
19 #define CONFIG_MALLOC_F_ADDR 0x0010000
21 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
23 /* turn on command-line edit/c/auto */
25 /* SPI - enable all SPI flash types for testing purposes */
27 #define CONFIG_SYS_FDT_LOAD_ADDR 0x100
29 #define CONFIG_PHYSMEM
31 /* Size of our emulated memory */
32 #define SB_CONCAT(x, y) x ## y
33 #define SB_TO_UL(s) SB_CONCAT(s, UL)
34 #define CONFIG_SYS_SDRAM_BASE 0
35 #define CONFIG_SYS_SDRAM_SIZE \
36 (SB_TO_UL(CONFIG_SANDBOX_RAM_SIZE_MB) << 20)
37 #define CONFIG_SYS_MONITOR_BASE 0
39 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
42 #define BOOT_TARGET_DEVICES(func) \
49 #include <config_distro_bootcmd.h>
52 #define CONFIG_KEEP_SERVERADDR
53 #define CONFIG_UDP_CHECKSUM
54 #define CONFIG_TIMESTAMP
55 #define CONFIG_BOOTP_SERVERIP
57 #ifndef SANDBOX_NO_SDL
58 #define CONFIG_SANDBOX_SDL
61 /* LCD and keyboard require SDL support */
62 #ifdef CONFIG_SANDBOX_SDL
63 #define LCD_BPP LCD_COLOR16
64 #define CONFIG_LCD_BMP_RLE8
66 #define CONFIG_KEYBOARD
68 #define SANDBOX_SERIAL_SETTINGS "stdin=serial,cros-ec-keyb,usbkbd\0" \
69 "stdout=serial,vidconsole\0" \
70 "stderr=serial,vidconsole\0"
72 #define SANDBOX_SERIAL_SETTINGS "stdin=serial\0" \
73 "stdout=serial,vidconsole\0" \
74 "stderr=serial,vidconsole\0"
77 #define SANDBOX_ETH_SETTINGS "ethaddr=00:00:11:22:33:44\0" \
78 "eth2addr=00:00:11:22:33:48\0" \
79 "eth3addr=00:00:11:22:33:45\0" \
80 "eth4addr=00:00:11:22:33:48\0" \
81 "eth5addr=00:00:11:22:33:46\0" \
82 "eth6addr=00:00:11:22:33:47\0" \
85 #define MEM_LAYOUT_ENV_SETTINGS \
86 "bootm_size=0x10000000\0" \
87 "kernel_addr_r=0x1000000\0" \
88 "fdt_addr_r=0xc00000\0" \
89 "ramdisk_addr_r=0x2000000\0" \
90 "scriptaddr=0x1000\0" \
91 "pxefile_addr_r=0x2000\0"
93 #define CONFIG_EXTRA_ENV_SETTINGS \
94 SANDBOX_SERIAL_SETTINGS \
95 SANDBOX_ETH_SETTINGS \
97 MEM_LAYOUT_ENV_SETTINGS
99 #ifndef CONFIG_SPL_BUILD
100 #define CONFIG_SYS_IDE_MAXBUS 1
101 #define CONFIG_SYS_ATA_IDE0_OFFSET 0
102 #define CONFIG_SYS_IDE_MAXDEVICE 2
103 #define CONFIG_SYS_ATA_BASE_ADDR 0x100
104 #define CONFIG_SYS_ATA_DATA_OFFSET 0
105 #define CONFIG_SYS_ATA_REG_OFFSET 1
106 #define CONFIG_SYS_ATA_ALT_OFFSET 2
107 #define CONFIG_SYS_ATA_STRIDE 4
110 #define CONFIG_SCSI_AHCI_PLAT
111 #define CONFIG_SYS_SCSI_MAX_DEVICE 2
112 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 8
113 #define CONFIG_SYS_SCSI_MAX_LUN 4
115 #define CONFIG_SYS_SATA_MAX_DEVICE 2